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| author | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-08-12 15:00:51 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2009-08-12 15:00:51 +0000 |
| commit | 0588d19abef62dad63a7794a37bdd6a71c526d9e (patch) | |
| tree | 1c507caa1ffed6ceb73d3e13fc9b766a713d16e2 /src/mainboard/artecgroup | |
| parent | 38cd29ebd7282333650cf11ed50c7f2fd4031e80 (diff) | |
| download | coreboot-0588d19abef62dad63a7794a37bdd6a71c526d9e.tar.xz | |
Kconfig!
Works on Kontron, qemu, and serengeti.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
tested on abuild only.
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/artecgroup')
| -rw-r--r-- | src/mainboard/artecgroup/Kconfig | 1 | ||||
| -rw-r--r-- | src/mainboard/artecgroup/dbe61/devicetree.cb | 42 |
2 files changed, 43 insertions, 0 deletions
diff --git a/src/mainboard/artecgroup/Kconfig b/src/mainboard/artecgroup/Kconfig new file mode 100644 index 0000000000..792d600548 --- /dev/null +++ b/src/mainboard/artecgroup/Kconfig @@ -0,0 +1 @@ +# diff --git a/src/mainboard/artecgroup/dbe61/devicetree.cb b/src/mainboard/artecgroup/dbe61/devicetree.cb new file mode 100644 index 0000000000..16e97fccf5 --- /dev/null +++ b/src/mainboard/artecgroup/dbe61/devicetree.cb @@ -0,0 +1,42 @@ +chip northbridge/amd/lx + device pci_domain 0 on + device pci 1.0 on end # Northbridge + device pci 1.1 on end # Graphics + chip southbridge/amd/cs5536 + # IRQ 12 and 1 unmasked, Keyboard and Mouse IRQs. OK + # SIRQ Mode = Active(Quiet) mode. Save power.... + # Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse IRQs. OK + register "lpc_serirq_enable" = "0x00001002" + register "lpc_serirq_polarity" = "0x0000EFFD" + register "lpc_serirq_mode" = "1" + register "enable_gpio_int_route" = "0x0D0C0700" + register "enable_ide_nand_flash" = "0" # 0:ide mode, 1:flash + register "enable_USBP4_device" = "0" #0: host, 1:device + register "enable_USBP4_overcurrent" = "0" #0:off, xxxx:overcurrent setting CS5536 Data Book (pages 380-381) + register "com1_enable" = "0" + register "com1_address" = "0x2F8" + register "com1_irq" = "3" + register "com2_enable" = "1" + register "com2_address" = "0x3F8" + register "com2_irq" = "4" + register "unwanted_vpci[0]" = "0" # End of list has a zero + device pci b.0 on end # Slot 3 + device pci c.0 on end # Slot 4 + device pci d.0 on end # Slot 1 + device pci e.0 on end # Slot 2 + device pci f.0 on end # ISA Bridge + device pci f.2 on end # IDE Controller + device pci f.3 on end # Audio + device pci f.4 on end # OHCI + device pci f.5 on end # EHCI + end + end + # APIC cluster is late CPU init. + device apic_cluster 0 on + chip cpu/amd/model_lx + device apic 0 on end + end + end + +end + |