summaryrefslogtreecommitdiff
path: root/src/mainboard/artecgroup
diff options
context:
space:
mode:
authorUwe Hermann <uwe@hermann-uwe.de>2010-11-21 22:47:22 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-11-21 22:47:22 +0000
commit7b997053eb2fcde464f5f6a1e5c85d1ffb6b4e32 (patch)
tree5339d014fbd29d3eb27cc82987eb7d655d9d8d1a /src/mainboard/artecgroup
parent57b2ff886e0ce2c92820f5722c8031def3ac94cf (diff)
downloadcoreboot-7b997053eb2fcde464f5f6a1e5c85d1ffb6b4e32.tar.xz
Simplify a few code chunks, fix whitespace and indentation.
Also, remove some less useful comments, some dead code / unused functions. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6108 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/artecgroup')
-rw-r--r--src/mainboard/artecgroup/dbe61/romstage.c8
1 files changed, 1 insertions, 7 deletions
diff --git a/src/mainboard/artecgroup/dbe61/romstage.c b/src/mainboard/artecgroup/dbe61/romstage.c
index 1cff578f1b..a8dc6cde59 100644
--- a/src/mainboard/artecgroup/dbe61/romstage.c
+++ b/src/mainboard/artecgroup/dbe61/romstage.c
@@ -66,11 +66,6 @@ static int spd_read_byte(unsigned device, unsigned address)
#include "cpu/amd/model_lx/syspreinit.c"
#include "cpu/amd/model_lx/msrinit.c"
-static void mb_gpio_init(void)
-{
- /* Early mainboard specific GPIO setup */
-}
-
void main(unsigned long bist)
{
post_code(0x01);
@@ -96,7 +91,6 @@ void main(unsigned long bist)
msr.lo |= 0x7 << 20;
wrmsr(MDD_LEG_IO, msr);
- mb_gpio_init();
uart_init();
console_init();
@@ -109,7 +103,7 @@ void main(unsigned long bist)
sdram_initialize(1, memctrl);
- /* Dump memory configuratation */
+ /* Dump memory configuration. */
#if 0
msr = rdmsr(MC_CF07_DATA);
print_debug("MC_CF07_DATA: ");