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author | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-08-12 15:00:51 +0000 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2009-08-12 15:00:51 +0000 |
commit | 0588d19abef62dad63a7794a37bdd6a71c526d9e (patch) | |
tree | 1c507caa1ffed6ceb73d3e13fc9b766a713d16e2 /src/mainboard/asi/mb_5blmp/devicetree.cb | |
parent | 38cd29ebd7282333650cf11ed50c7f2fd4031e80 (diff) | |
download | coreboot-0588d19abef62dad63a7794a37bdd6a71c526d9e.tar.xz |
Kconfig!
Works on Kontron, qemu, and serengeti.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
tested on abuild only.
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/asi/mb_5blmp/devicetree.cb')
-rw-r--r-- | src/mainboard/asi/mb_5blmp/devicetree.cb | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/src/mainboard/asi/mb_5blmp/devicetree.cb b/src/mainboard/asi/mb_5blmp/devicetree.cb new file mode 100644 index 0000000000..8ec750cda6 --- /dev/null +++ b/src/mainboard/asi/mb_5blmp/devicetree.cb @@ -0,0 +1,56 @@ +chip northbridge/amd/gx1 # Northbridge + device pci_domain 0 on + device pci 0.0 on end # Host bridge + chip southbridge/amd/cs5530 # Southbridge + device pci 0f.0 off end # Ethernet (Realtek RTL8139B) + device pci 12.0 on # ISA bridge + chip superio/nsc/pc87351 # Super I/O + device pnp 2e.4 on # PS/2 keyboard (+ mouse?) + io 0x60 = 0x60 + io 0x62 = 0x64 + irq 0x70 = 1 + # irq 0x72 = 12 + end + device pnp 2e.a on # PS/2 mouse + irq 0x70 = 12 + end + device pnp 2e.e on # COM1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 2e.f off # Floppy + io 0x60 = 0x3f2 + irq 0x70 = 6 + drq 0x74 = 2 + end + device pnp 2e.10 on # Parallel port + io 0x60 = 0x378 + irq 0x70 = 7 + end + device pnp 2e.12 on # COM2 + io 0x60 = 0x2f8 + irq 0x70 = 3 + end + end + end + device pci 12.1 off end # SMI + device pci 12.2 on end # IDE + device pci 12.3 on end # Audio + device pci 12.4 on end # VGA (onboard) + # device pci 12.4 on # VGA (onboard) + # chip drivers/pci/onboard + # device pci 12.4 on end + # register "rom_address" = "0xfffc0000" # 256 KB image + # # register "rom_address" = "0xfff80000" # 512 KB image + # # register "rom_address" = "0xfff00000" # 1 MB image + # end + # end + device pci 13.0 on end # USB + register "ide0_enable" = "1" + register "ide1_enable" = "1" + end + end + chip cpu/amd/model_gx1 # CPU + end +end + |