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| author | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-10-05 13:40:31 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-10-05 13:40:31 +0000 |
| commit | 5692c5733633bfb8b23f1111de152eff0233b713 (patch) | |
| tree | d315817986c71d6710f75dceb87689b95e1bff53 /src/mainboard/asrock/939a785gmh | |
| parent | d0835953506263b0d9218b62176693315f2ef2f3 (diff) | |
| download | coreboot-5692c5733633bfb8b23f1111de152eff0233b713.tar.xz | |
- move EHCI_BAR_INDEX to ehci.h - it's constant as per EHCI spec 2.3.1
- move EHCI_BAR and EHCI_DEBUG_OFFSET to Kconfig to be set by USB debug port enabled southbridges
- drop USB debug code includes from romstage.cs and use romstage-srcs in the build system instead
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5911 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/asrock/939a785gmh')
| -rw-r--r-- | src/mainboard/asrock/939a785gmh/romstage.c | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/src/mainboard/asrock/939a785gmh/romstage.c b/src/mainboard/asrock/939a785gmh/romstage.c index dac230734b..1a01e5d0f5 100644 --- a/src/mainboard/asrock/939a785gmh/romstage.c +++ b/src/mainboard/asrock/939a785gmh/romstage.c @@ -51,11 +51,7 @@ #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "superio/winbond/w83627dhg/w83627dhg_early_serial.c" - -#if CONFIG_USBDEBUG -#include "southbridge/amd/sb700/sb700_enable_usbdebug.c" -#include "pc80/usbdebug_serial.c" -#endif +#include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" |