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authorPatrick Georgi <patrick@georgi-clan.de>2012-04-20 19:19:47 +0200
committerPatrick Georgi <patrick@georgi-clan.de>2012-04-20 21:18:02 +0200
commit26b00e6d3954dcfa00ee4d7c874161b2fbdd2ce2 (patch)
treecc4549a622b5cd43578b0cabe2cfb622114c4b11 /src/mainboard/asrock/939a785gmh
parentd6e4d518b1dbfdcfbea7b56113530900ba3e03b1 (diff)
downloadcoreboot-26b00e6d3954dcfa00ee4d7c874161b2fbdd2ce2.tar.xz
Refactor some alignment handling
Made using coccinelle: @@ expression E; @@ -(E + 7) & -8 +ALIGN(E, 8) @@ expression E; @@ -(E + 15) & -16 +ALIGN(E, 16) Change-Id: I071d2c98cd95580d7de21d256c31b6368a3dc70b Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/910 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/asrock/939a785gmh')
-rw-r--r--src/mainboard/asrock/939a785gmh/acpi_tables.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/asrock/939a785gmh/acpi_tables.c b/src/mainboard/asrock/939a785gmh/acpi_tables.c
index c0d8691afe..41f417335f 100644
--- a/src/mainboard/asrock/939a785gmh/acpi_tables.c
+++ b/src/mainboard/asrock/939a785gmh/acpi_tables.c
@@ -123,7 +123,7 @@ unsigned long write_acpi_tables(unsigned long start)
get_bus_conf(); /* it will get sblk, pci1234, hcdn, and sbdn */
/* Align ACPI tables to 16 bytes */
- start = (start + 0x0f) & -0x10;
+ start = ALIGN(start, 16);
current = start;
printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx...\n", start);
@@ -178,7 +178,7 @@ unsigned long write_acpi_tables(unsigned long start)
c = (u8) ('A' + i - 1 - 6);
}
printk(BIOS_DEBUG, "ACPI: * SSDT for PCI%c Aka hcid = %d\n", c, sysconf.hcid[i]); /* pci0 and pci1 are in dsdt */
- current = (current + 0x07) & -0x08;
+ current = ALIGN(current, 8);
ssdtx = (acpi_header_t *) current;
switch (sysconf.hcid[i]) {
case 1: /* 8132 */