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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-12 16:17:26 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-18 07:06:13 +0000 |
| commit | dc2e7c6e0fb1331a7808c226992c71e07f9ca7bd (patch) | |
| tree | f1bde11a320b587f99bc3a62e654ab1be346ea24 /src/mainboard/asrock/b75pro3-m | |
| parent | 05d7d82d37ae04ec4cf3579eb1c0f7bf0c0b7aa2 (diff) | |
| download | coreboot-dc2e7c6e0fb1331a7808c226992c71e07f9ca7bd.tar.xz | |
nb/intel/sandybridge: Make the mainboard_early_init hook optional
This adds an empty weakly linked default. The rationale behind this
change is that without the callback some features might not work
but that the result is likely still able to boot, so it can be made
optional.
Change-Id: I62c8010aa81fc45d208e9293feb2f45b45f34a82
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36780
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/asrock/b75pro3-m')
| -rw-r--r-- | src/mainboard/asrock/b75pro3-m/romstage.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/asrock/b75pro3-m/romstage.c b/src/mainboard/asrock/b75pro3-m/romstage.c index da895b31fd..fe6d1833d2 100644 --- a/src/mainboard/asrock/b75pro3-m/romstage.c +++ b/src/mainboard/asrock/b75pro3-m/romstage.c @@ -48,10 +48,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 0, 6 }, }; -void mainboard_early_init(int s3resume) -{ -} - void mainboard_config_superio(void) { /* Set GPIOs on superio, enable UART */ |