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authorAngel Pons <th3fanbus@gmail.com>2019-11-12 10:05:33 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-03-19 12:01:45 +0000
commitdf248f0c10f77b4de287be7754afadce1abca84c (patch)
tree36774a619c892d4f7521642210424a4c4b95ef7f /src/mainboard/asrock/b85m_pro4/dsdt.asl
parent5baadba532aec78d76d2ba1efea825b5f9b75efc (diff)
downloadcoreboot-df248f0c10f77b4de287be7754afadce1abca84c.tar.xz
mb/asrock/b85m_pro4: Add new mainboard
This is a µATX mainboard with a LGA1150 socket and four DDR3 DIMM slots. Working: - All four DIMM slots - Serial port to emit spam - Some USB ports - Integrated graphics (libgfxinit) - HDMI and DVI - Intel GbE - All PCIe ports - Both PCI ports behind the ASM1083 PCI bridge - At least one SATA port - RAM initialization with MRC binary - Flashing with flashrom - S3 suspend/resume - Rear audio output - VBT - SeaBIOS to boot Arch Linux Not working: - PS/2 keyboard (detected as mouse) Untested: - The other audio jacks - S/PDIF - VGA - EHCI debug - Front USB headers - Non-Linux OSes - TPM header - Parallel port Change-Id: I10a16dfc56f2aa88648c8aaaba4feab40c491504 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36770 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/asrock/b85m_pro4/dsdt.asl')
-rw-r--r--src/mainboard/asrock/b85m_pro4/dsdt.asl40
1 files changed, 40 insertions, 0 deletions
diff --git a/src/mainboard/asrock/b85m_pro4/dsdt.asl b/src/mainboard/asrock/b85m_pro4/dsdt.asl
new file mode 100644
index 0000000000..0fa3253a43
--- /dev/null
+++ b/src/mainboard/asrock/b85m_pro4/dsdt.asl
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018 Angel Pons <th3fanbus@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/acpi.h>
+
+DefinitionBlock(
+ "dsdt.aml",
+ "DSDT",
+ 0x02, /* DSDT revision: ACPI v2.0 and up */
+ OEM_ID,
+ ACPI_TABLE_CREATOR,
+ 0x20141018 /* OEM revision */
+)
+{
+ #include "acpi/platform.asl"
+ #include "acpi/superio.asl"
+ #include <southbridge/intel/common/acpi/platform.asl>
+ #include <southbridge/intel/lynxpoint/acpi/globalnvs.asl>
+ #include <southbridge/intel/common/acpi/sleepstates.asl>
+ #include <cpu/intel/common/acpi/cpu.asl>
+
+ Device (\_SB.PCI0)
+ {
+ #include <northbridge/intel/haswell/acpi/haswell.asl>
+ #include <southbridge/intel/lynxpoint/acpi/pch.asl>
+ #include <drivers/intel/gma/acpi/default_brightness_levels.asl>
+ }
+}