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authorKerry Sheh <shekairui@gmail.com>2011-10-10 19:19:46 +0800
committerMarc Jones <marcj303@gmail.com>2011-10-11 08:11:59 +0200
commit75df1062a1438c40bc94021982fd389848f1d7fc (patch)
treeb7d1da581dc76891dae751283458a5a49b7458d9 /src/mainboard/asrock/e350m1/devicetree.cb
parent4e9c4c8cc25347693a19aef0201ba2065e3d816f (diff)
downloadcoreboot-75df1062a1438c40bc94021982fd389848f1d7fc.tar.xz
mainboard: complete the sb800 devicetree even device is off
sb800 cimx entry sb_Before_Pci_Init was called in the device 16.2 enable_dev() function. If the devicetree don't have this device, then sb_Before_Pci_Init will not get called. Change-Id: I76ebad842e90b0f740abbec031165d7c39a80abf Signed-off-by: Kerry Sheh <kerry.she@amd.com> Signed-off-by: Kerry Sheh <shekairui@gmail.com> Reviewed-on: http://review.coreboot.org/230 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/mainboard/asrock/e350m1/devicetree.cb')
-rw-r--r--src/mainboard/asrock/e350m1/devicetree.cb2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/asrock/e350m1/devicetree.cb b/src/mainboard/asrock/e350m1/devicetree.cb
index bff8151fff..ca5cf2bce7 100644
--- a/src/mainboard/asrock/e350m1/devicetree.cb
+++ b/src/mainboard/asrock/e350m1/devicetree.cb
@@ -103,6 +103,8 @@ chip northbridge/amd/agesa/family14/root_complex
device pci 15.1 on end # PCIe PortB: NIC
device pci 15.2 on end # PCIe PortC: USB3
device pci 15.3 off end # PCIe PortD
+ device pci 16.0 off end # OHCI USB3
+ device pci 16.2 off end # EHCI USB3
# gpp_configuration options
#0000: PortA lanes[3:0]