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authorPaul Menzel <paulepanter@users.sourceforge.net>2013-05-14 10:06:47 +0200
committerBruce Griffith <Bruce.Griffith@se-eng.com>2013-05-30 18:10:45 +0200
commitd189229b45866105a8f4a8aac44a59774d030f81 (patch)
tree1185a934909284e8a1a7da591ece72e4bb1b9841 /src/mainboard/asrock/e350m1
parentd3ed411123c9655c6013cb8ed8d3d91cc2dc8c62 (diff)
downloadcoreboot-d189229b45866105a8f4a8aac44a59774d030f81.tar.xz
AMD Llano, Brazos boards: Use `sizeof(var)` to get its size
Change `sizeof(type) * n`, where n is the number of array elements, to `sizeof(variable)` to directly get the size of the variable (struct, array). Determining the size by counting array elements is error prone and unnecessary. Rudolf Marek’s patch »ASUS F2A85-M: Correct and clean up PCIe config« [1] contains the same change and is ported over. In the commit message Rudolf makes the following comment. »Not sure why the copy is needed instead of direct reference. Maybe it has something to do with CAR?« Testing on the ASRock E350M1, no regressions were noticed. [1] http://review.coreboot.org/#/c/3194/ Change-Id: I123031b3819a10c9c85577fdca96c70d9c992e87 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3248 Tested-by: build bot (Jenkins) Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Diffstat (limited to 'src/mainboard/asrock/e350m1')
-rw-r--r--src/mainboard/asrock/e350m1/PlatformGnbPcie.c20
1 files changed, 9 insertions, 11 deletions
diff --git a/src/mainboard/asrock/e350m1/PlatformGnbPcie.c b/src/mainboard/asrock/e350m1/PlatformGnbPcie.c
index ee25ac9df4..50a8db995d 100644
--- a/src/mainboard/asrock/e350m1/PlatformGnbPcie.c
+++ b/src/mainboard/asrock/e350m1/PlatformGnbPcie.c
@@ -118,9 +118,7 @@ PCIe_COMPLEX_DESCRIPTOR Brazos = {
//
// Allocate buffer for PCIe_COMPLEX_DESCRIPTOR , PCIe_PORT_DESCRIPTOR and PCIe_DDI_DESCRIPTOR
//
- AllocHeapParams.RequestedBufferSize = sizeof (PCIe_COMPLEX_DESCRIPTOR) +
- sizeof (PCIe_PORT_DESCRIPTOR) * 5 +
- sizeof (PCIe_DDI_DESCRIPTOR) * 2;
+ AllocHeapParams.RequestedBufferSize = sizeof(Brazos) + sizeof(PortList) + sizeof(DdiList);
AllocHeapParams.BufferHandle = AMD_MEM_MISC_HANDLES_START;
AllocHeapParams.Persist = HEAP_LOCAL_CACHE;
@@ -133,30 +131,30 @@ PCIe_COMPLEX_DESCRIPTOR Brazos = {
BrazosPcieComplexListPtr = (PCIe_COMPLEX_DESCRIPTOR *) AllocHeapParams.BufferPtr;
- AllocHeapParams.BufferPtr += sizeof (PCIe_COMPLEX_DESCRIPTOR);
+ AllocHeapParams.BufferPtr += sizeof(Brazos);
BrazosPciePortPtr = (PCIe_PORT_DESCRIPTOR *)AllocHeapParams.BufferPtr;
- AllocHeapParams.BufferPtr += sizeof (PCIe_PORT_DESCRIPTOR) * 5;
+ AllocHeapParams.BufferPtr += sizeof(PortList);
BrazosPcieDdiPtr = (PCIe_DDI_DESCRIPTOR *) AllocHeapParams.BufferPtr;
LibAmdMemFill (BrazosPcieComplexListPtr,
0,
- sizeof (PCIe_COMPLEX_DESCRIPTOR),
+ sizeof(Brazos),
&InitEarly->StdHeader);
LibAmdMemFill (BrazosPciePortPtr,
0,
- sizeof (PCIe_PORT_DESCRIPTOR) * 5,
+ sizeof(PortList),
&InitEarly->StdHeader);
LibAmdMemFill (BrazosPcieDdiPtr,
0,
- sizeof (PCIe_DDI_DESCRIPTOR) * 2,
+ sizeof(DdiList),
&InitEarly->StdHeader);
- LibAmdMemCopy (BrazosPcieComplexListPtr, &Brazos, sizeof (PCIe_COMPLEX_DESCRIPTOR), &InitEarly->StdHeader);
- LibAmdMemCopy (BrazosPciePortPtr, &PortList[0], sizeof (PCIe_PORT_DESCRIPTOR) * 5, &InitEarly->StdHeader);
- LibAmdMemCopy (BrazosPcieDdiPtr, &DdiList[0], sizeof (PCIe_DDI_DESCRIPTOR) *2, &InitEarly->StdHeader);
+ LibAmdMemCopy (BrazosPcieComplexListPtr, &Brazos, sizeof(Brazos), &InitEarly->StdHeader);
+ LibAmdMemCopy (BrazosPciePortPtr, &PortList[0], sizeof(PortList), &InitEarly->StdHeader);
+ LibAmdMemCopy (BrazosPcieDdiPtr, &DdiList[0], sizeof(DdiList), &InitEarly->StdHeader);
((PCIe_COMPLEX_DESCRIPTOR*)BrazosPcieComplexListPtr)->PciePortList = (PCIe_PORT_DESCRIPTOR*)BrazosPciePortPtr;