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| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-04-28 02:07:32 +1000 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-04-28 18:59:39 +0200 |
| commit | dbbc136c83d08db6f93f77ff897b64be2b90d078 (patch) | |
| tree | 3832d9f565fde05435cdec278d2b7948564faed1 /src/mainboard/asrock/e350m1 | |
| parent | 5a032c628b51e39fc160102f17f52ba0678db32d (diff) | |
| download | coreboot-dbbc136c83d08db6f93f77ff897b64be2b90d078.tar.xz | |
mainboard/asrock/e350m1: Avoid including early_serial.c
Use generic winbond romstage serial init symbols instead of model
specific implementation. We do this on a case by case basis as some
boards are ROMCC and so need to #include .c files. This is a step to
migrate non-romcc boards to a more generic superio framework.
Change-Id: I56f6d9ec77cd21a612cbbdb48634543f34a2e72c
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5591
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/asrock/e350m1')
| -rw-r--r-- | src/mainboard/asrock/e350m1/romstage.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/mainboard/asrock/e350m1/romstage.c b/src/mainboard/asrock/e350m1/romstage.c index cbfa7434d3..ba2e34dfda 100644 --- a/src/mainboard/asrock/e350m1/romstage.c +++ b/src/mainboard/asrock/e350m1/romstage.c @@ -32,7 +32,8 @@ #include "cpu/amd/car.h" #include "agesawrapper.h" #include "cpu/x86/bist.h" -#include "superio/winbond/w83627hf/early_serial.c" +#include <superio/winbond/common/winbond.h> +#include <superio/winbond/w83627hf/w83627hf.h> #include "cpu/x86/lapic.h" #include "drivers/pc80/i8254.c" #include "drivers/pc80/i8259.c" @@ -61,7 +62,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sb_Poweron_Init(); post_code(0x31); - w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); } |