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authorPaul Menzel <paulepanter@users.sourceforge.net>2018-07-16 08:39:22 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-05-20 14:43:44 +0000
commit2e585a12a247e7993c45aa887b9f4c22e63ccbed (patch)
treeb8e1dc4c1c0ded7f95812d0492821efb687aee84 /src/mainboard/asrock/e350m1
parent811a51ac6757b30392385009579f5eddbd9540ab (diff)
downloadcoreboot-2e585a12a247e7993c45aa887b9f4c22e63ccbed.tar.xz
sb/amd/cimx/sb800: Get rid of power button device in coreboot
Apply commit d7b88dcb (mb/google/x86-boards: Get rid of power button device in coreboot) to AMD Brazos boards [1]: > As per the ACPI specification, there are two types of power button > devices: > 1. Fixed hardware power button > 2. Generic hardware power button > > Fixed hardware power button is added by the OSPM if POWER_BUTTON flag > is not set in FADT by the BIOS. This device has its programming model > in PM1x_EVT_BLK. All ACPI compliant OSes are expected to add this > power button device by default if the power button FADT flag is not > set. > > On the other hand, generic hardware power button can be used by > platforms if fixed register space cannot be used for the power button > device. In order to support this, power button device object with HID > PNP0C0C is expected to be added to ACPI tables. Additionally, > POWER_BUTTON flag should be set to indicate the presence of control > method for power button. [..] > This change gets rid of the generic hardware power button from all > google mainboards and relies completely on the fixed hardware power > button. The same problem exists with the AMD Hudson devices in coreboot. For AMD Hudson (2) and Yangtze based devices this was removed in commit 44f2fab8 (AMD hudson and yangtze boards: Let mainboard declare power button) [2]. Two devices are detected. $ dmesg | grep Button [ 0.209213] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input0 [ 0.209254] ACPI: Power Button [PWRB] [ 0.209332] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input1 [ 0.209349] ACPI: Power Button [PWRF] $ sudo evtest No device specified, trying to scan all of /dev/input/event* Available devices: /dev/input/event0: Power Button /dev/input/event1: Power Button [..] [1]: https://review.coreboot.org/5546 [2]: https://review.coreboot.org/27272 Change-Id: I0cbecb72f7e1bf3d051d3b7656c6af4d6f43b497 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/27496 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/asrock/e350m1')
-rw-r--r--src/mainboard/asrock/e350m1/acpi/gpe.asl9
1 files changed, 0 insertions, 9 deletions
diff --git a/src/mainboard/asrock/e350m1/acpi/gpe.asl b/src/mainboard/asrock/e350m1/acpi/gpe.asl
index 0ba8899a60..7994ae31a5 100644
--- a/src/mainboard/asrock/e350m1/acpi/gpe.asl
+++ b/src/mainboard/asrock/e350m1/acpi/gpe.asl
@@ -15,12 +15,6 @@
Scope(\_GPE) { /* Start Scope GPE */
- /* General event 3 */
- Method(_L03) {
- /* DBGO("\\_GPE\\_L00\n") */
- Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
- }
-
/* Legacy PM event */
Method(_L08) {
/* DBGO("\\_GPE\\_L08\n") */
@@ -42,7 +36,6 @@ Scope(\_GPE) { /* Start Scope GPE */
Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
}
/* ExtEvent0 SCI event */
@@ -63,14 +56,12 @@ Scope(\_GPE) { /* Start Scope GPE */
Notify(\_SB.PCI0.PBR5, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PCI0.PBR6, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PCI0.PBR7, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
}
/* Azalia SCI event */
Method(_L1B) {
/* DBGO("\\_GPE\\_L1B\n") */
Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
- Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
}
} /* End Scope GPE */