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authorArthur Heymans <arthur@aheymans.xyz>2018-09-13 21:17:25 +0200
committerFelix Held <felix-coreboot@felixheld.de>2018-09-25 13:58:33 +0000
commitae7bd1eb23d878d22a2473bd61440377dff77df4 (patch)
treea26c910b6255ac3d6ef88e08ae013e37868331f0 /src/mainboard/asrock/g41c-gs/variants/g41m-vs3-r2/devicetree.cb
parent8165583ed9234364824c41b7b74153aba36b60ce (diff)
downloadcoreboot-ae7bd1eb23d878d22a2473bd61440377dff77df4.tar.xz
mb/asrock/g41m_vs3_r2: Add mainboard
The following was tested: - CPUs with 800, 1067, 1333MHz FSB (1333MHz FSB needs a jumper set) - The VGA output with libgfxinit - USB - COM1 - Ethernet - SATA - PCIe - PCI Has the following problems: - The Ethernet NIC is not usable after S3 resume and requires Linux to reload the driver. Vendor firmware also has this problem so it is quite likely it is just a atl1c driver problem. TODO: Add documentation Change-Id: Ibce9ecdc0e44db3703401f116c9a8bff5b66437f Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/28596 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/asrock/g41c-gs/variants/g41m-vs3-r2/devicetree.cb')
-rw-r--r--src/mainboard/asrock/g41c-gs/variants/g41m-vs3-r2/devicetree.cb139
1 files changed, 139 insertions, 0 deletions
diff --git a/src/mainboard/asrock/g41c-gs/variants/g41m-vs3-r2/devicetree.cb b/src/mainboard/asrock/g41c-gs/variants/g41m-vs3-r2/devicetree.cb
new file mode 100644
index 0000000000..6e47ea942f
--- /dev/null
+++ b/src/mainboard/asrock/g41c-gs/variants/g41m-vs3-r2/devicetree.cb
@@ -0,0 +1,139 @@
+#
+# This file is part of the coreboot project.
+#
+# Copyright (C) 2017 Arthur Heymans <arthur@aheymans.xyz>
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+chip northbridge/intel/x4x # Northbridge
+ device cpu_cluster 0 on # APIC cluster
+ chip cpu/intel/socket_LGA775
+ device lapic 0 on end
+ end
+ chip cpu/intel/model_1067x # CPU
+ device lapic 0xACAC off end
+ end
+ end
+ device domain 0 on # PCI domain
+ subsystemid 0x1458 0x5000 inherit
+ device pci 0.0 on # Host Bridge
+ subsystemid 0x1849 0x2e30
+ end
+ device pci 1.0 on end # PEG
+
+ device pci 2.0 on # Integrated graphics controller
+ subsystemid 0x1849 0x2e32
+ end
+ device pci 3.0 off end # ME
+ device pci 3.1 off end # ME
+ chip southbridge/intel/i82801gx # Southbridge
+ register "pirqa_routing" = "0x0b"
+ register "pirqb_routing" = "0x0b"
+ register "pirqc_routing" = "0x0b"
+ register "pirqd_routing" = "0x0b"
+ register "pirqe_routing" = "0x80"
+ register "pirqf_routing" = "0x80"
+ register "pirqg_routing" = "0x80"
+ register "pirqh_routing" = "0x0b"
+
+ register "ide_enable_primary" = "0x1"
+ register "sata_ahci" = "0x0" # AHCI not supported on this ICH7 variant
+ register "gpe0_en" = "0x440"
+
+ device pci 1b.0 on # Audio
+ subsystemid 0x1849 0x3662
+ end
+ device pci 1c.0 on end # PCIe 1
+ device pci 1c.1 on end # PCIe 2 (ethernet)
+ device pci 1c.2 off end # PCIe 3
+ device pci 1c.3 off end # PCIe 4
+ device pci 1c.4 off end # PCIe 5
+ device pci 1c.5 off end # PCIe 6
+ device pci 1d.0 on # USB
+ subsystemid 0x1849 0x27c8
+ end
+ device pci 1d.1 on # USB
+ subsystemid 0x1849 0x27c9
+ end
+ device pci 1d.2 on # USB
+ subsystemid 0x1849 0x27ca
+ end
+ device pci 1d.3 on # USB
+ subsystemid 0x1849 0x27cb
+ end
+ device pci 1d.7 on # USB
+ subsystemid 0x1849 0x27cc
+ end
+ device pci 1e.0 on end # PCI bridge
+ device pci 1e.2 off end # AC'97 Audio
+ device pci 1e.3 off end # AC'97 Modem
+ device pci 1f.0 on # ISA bridge
+ subsystemid 0x1849 0x27b8
+ chip superio/winbond/w83627dhg
+ device pnp 2e.0 off end # Floppy
+ device pnp 2e.1 on # Parallel port
+ # global
+ irq 0x28 = 0x70
+ irq 0x2c = 0xd2
+ # parallel port
+ io 0x60 = 0x378
+ irq 0x70 = 7
+ drq 0x74 = 3
+ end
+ device pnp 2e.2 on # COM1
+ io 0x60 = 0x3f8
+ irq 0x70 = 4
+ end
+ device pnp 2e.3 off end # COM2
+ device pnp 2e.5 on # Keyboard & MOUSE
+ io 0x60 = 0x60
+ io 0x62 = 0x64
+ irq 0x70 = 1
+ irq 0x72 = 0x0C
+ end
+ device pnp 2e.6 off end # SPI
+ device pnp 2e.7 off end # GPIO6
+ device pnp 2e.8 off end # WDT0#, PLED
+ device pnp 2e.9 on end # GPIO2
+ device pnp 2e.109 off end # GPIO3
+ device pnp 2e.209 on # GPIO4
+ irq 0xf4 = 0xb3
+ end
+ device pnp 2e.309 off end # GPIO5
+ device pnp 2e.a on # ACPI
+ irq 0xe4 = 0x10 # Power dram during s3
+ end
+ device pnp 2e.b on # HWM, front panel LED
+ io 0x60 = 0x290
+ irq 0x70 = 0
+ end
+ device pnp 2e.c off end # PECI, SST
+ end
+ end
+ device pci 1f.1 on # PATA/IDE
+ subsystemid 0x1849 0x27df
+ end
+ device pci 1f.2 on # SATA
+ subsystemid 0x1849 0x27c0
+ end
+ device pci 1f.3 on # SMbus
+ subsystemid 0x1849 0x27da
+ chip drivers/i2c/ck505 # W83115RG-965
+ # set SATA to fixed 100Mhz refclk
+ register "mask" = "{ 0x02 }"
+ register "regs" = "{ 0x02 }"
+ device i2c 69 on end
+ end
+ end
+ end
+ end
+end