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authorArthur Heymans <arthur@aheymans.xyz>2017-08-15 20:59:09 +0200
committerArthur Heymans <arthur@aheymans.xyz>2018-01-14 21:43:25 +0000
commitb451df2f400ba12fff440247330f8b57a93034bd (patch)
tree8bb52821a42aaaea2e614910d97b1ae4e690b7c2 /src/mainboard/asrock/g41c-gs
parente4a016ff17b455a8acd0ea72b30caabb622ce224 (diff)
downloadcoreboot-b451df2f400ba12fff440247330f8b57a93034bd.tar.xz
mb/*/*/romstage.c: Clean up targets with i82801gx
Things cleaned up in this patch: * Add macros for the GENx_DEC registers; * replace many magic numbers by macros; * remove many writes to DxxIP since they were 'setting' reset default values; * fix some comments about decode ranges. Change-Id: I9d6a0ff3d391947f611a2f3c65684f4ee57bc263 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/21065 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/asrock/g41c-gs')
-rw-r--r--src/mainboard/asrock/g41c-gs/romstage.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/asrock/g41c-gs/romstage.c b/src/mainboard/asrock/g41c-gs/romstage.c
index 24a5cfde39..e9000a6fa7 100644
--- a/src/mainboard/asrock/g41c-gs/romstage.c
+++ b/src/mainboard/asrock/g41c-gs/romstage.c
@@ -58,8 +58,8 @@ static void mb_lpc_setup(void)
RCBA16(D29IR) = 0x0237;
/* Enable IOAPIC */
- RCBA8(0x31ff) = 0x03;
- RCBA8(0x31ff);
+ RCBA8(OIC) = 0x03;
+ RCBA8(OIC);
reg32 = RCBA32(GCS);
reg32 |= (1 << 5);