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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-03 08:45:19 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-04 15:58:55 +0000
commit3855c01e0a9d9e9787652479576e882bcda9fde5 (patch)
tree940945c52e59fb334b41960ab17513f240e95884 /src/mainboard/asrock/g41c-gs
parent369559379453f9bf0e917635b642e6f70d55a93e (diff)
downloadcoreboot-3855c01e0a9d9e9787652479576e882bcda9fde5.tar.xz
device/pnp: Add header files for PNP ops
Change-Id: Ifda495420cfb121ad32920bb9f1cbdeef41f6d3a Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31698 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/asrock/g41c-gs')
-rw-r--r--src/mainboard/asrock/g41c-gs/romstage.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/asrock/g41c-gs/romstage.c b/src/mainboard/asrock/g41c-gs/romstage.c
index 12f5cd4ffd..8474d189a3 100644
--- a/src/mainboard/asrock/g41c-gs/romstage.c
+++ b/src/mainboard/asrock/g41c-gs/romstage.c
@@ -15,7 +15,7 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
+#include <device/pnp_ops.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/intel/romstage.h>