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author | Angel Pons <th3fanbus@gmail.com> | 2020-07-03 23:52:34 +0200 |
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committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-12 10:10:11 +0000 |
commit | d37b7d89fd362242fd5da11303c7bb18bf78afcf (patch) | |
tree | 12b4b962e423fb10816b848cb5a5143fd79fc84e /src/mainboard/asrock/h81m-hds/romstage.c | |
parent | 3ac92b7c93addd8e75096162f88e65a3a54fcab0 (diff) | |
download | coreboot-d37b7d89fd362242fd5da11303c7bb18bf78afcf.tar.xz |
haswell: Add function to retrieve SPD addresses
And use it instead of directly writing to the MRC struct.
Change-Id: I7f04db29a08512c1a8b2b2300dba71cb3b84a5c5
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43127
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
Diffstat (limited to 'src/mainboard/asrock/h81m-hds/romstage.c')
-rw-r--r-- | src/mainboard/asrock/h81m-hds/romstage.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/src/mainboard/asrock/h81m-hds/romstage.c b/src/mainboard/asrock/h81m-hds/romstage.c index cfefdda6de..0573b6b171 100644 --- a/src/mainboard/asrock/h81m-hds/romstage.c +++ b/src/mainboard/asrock/h81m-hds/romstage.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <stdint.h> #include <northbridge/intel/haswell/haswell.h> #include <northbridge/intel/haswell/raminit.h> #include <southbridge/intel/lynxpoint/pch.h> @@ -16,10 +17,14 @@ void mainboard_config_rcba(void) RCBA16(D20IR) = DIR_ROUTE(PIRQA, PIRQB, PIRQC, PIRQD); } +void mb_get_spd_map(uint8_t spd_map[4]) +{ + spd_map[0] = 0xa0; + spd_map[2] = 0xa4; +} + void mainboard_fill_pei_data(struct pei_data *pei_data) { - pei_data->spd_addresses[0] = 0xa0; - pei_data->spd_addresses[2] = 0xa4; pei_data->ec_present = 0; struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = { |