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| author | Shawn Nematbakhsh <shawnn@chromium.org> | 2013-08-13 10:50:15 -0700 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2013-12-21 12:17:54 +0100 |
| commit | c59fda321697974d467dc7ae8f7b22b43a1899af (patch) | |
| tree | 97e02e42b418845c7b69dda057324e28470a834e /src/mainboard/asrock/imb-a180/cmos.layout | |
| parent | 287522749ececda35b52dc9b9e8e704e305ec888 (diff) | |
| download | coreboot-c59fda321697974d467dc7ae8f7b22b43a1899af.tar.xz | |
peppy: Set optimal DTLE register values
Empirical testing shows that 0x5 is the optimal setting for DTLE DATA /
EDGE on Peppy.
Change-Id: I273a3a68be97b3eb7c2ee2071e5de1ef7bf7f2d9
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/65717
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/4476
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/asrock/imb-a180/cmos.layout')
0 files changed, 0 insertions, 0 deletions