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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2014-07-21 08:07:19 +0200 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2014-07-24 12:43:01 +0200 |
| commit | aedcc10ad30f3fcc1397035876672d235418393f (patch) | |
| tree | b65ec6f8e964ba7cbd6866cc54e1cc415072c05c /src/mainboard/asrock/imb-a180 | |
| parent | 643646075019816c6ae441f613426caaf7b0bd2e (diff) | |
| download | coreboot-aedcc10ad30f3fcc1397035876672d235418393f.tar.xz | |
src/mainboard: Remove trailing whitespace
Change-Id: I14a9dc99acb5d5365a3d7e99a3964120bb611b05
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: http://review.coreboot.org/6308
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/asrock/imb-a180')
| -rw-r--r-- | src/mainboard/asrock/imb-a180/buildOpts.c | 2 | ||||
| -rw-r--r-- | src/mainboard/asrock/imb-a180/romstage.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/asrock/imb-a180/buildOpts.c b/src/mainboard/asrock/imb-a180/buildOpts.c index 520da8b74d..55df22ae8b 100644 --- a/src/mainboard/asrock/imb-a180/buildOpts.c +++ b/src/mainboard/asrock/imb-a180/buildOpts.c @@ -250,7 +250,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] = #define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList -//#include "KeralaInstall.h" +//#include "KeralaInstall.h" /* Include the files that instantiate the configuration definitions. */ #include "cpuRegisters.h" diff --git a/src/mainboard/asrock/imb-a180/romstage.c b/src/mainboard/asrock/imb-a180/romstage.c index b750e440af..37f14f6c39 100644 --- a/src/mainboard/asrock/imb-a180/romstage.c +++ b/src/mainboard/asrock/imb-a180/romstage.c @@ -92,8 +92,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* Load MPB */ val = cpuid_eax(1); - printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val); - printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx); + printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val); + printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx); /* On Larne, after LpcClkDrvSth is set, it needs some time to be stable, because of the buffer ICS551M */ int i; |