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authorPatrick Rudolph <patrick.rudolph@9elements.com>2019-03-24 15:06:17 +0100
committerPatrick Rudolph <siro@das-labor.org>2019-04-13 14:49:31 +0000
commit425e75a2db999d65400b49ebe65ae26c64aabcd9 (patch)
treeb2407f1d50cc8a6129f226d7df919afcd2fd89f7 /src/mainboard/asrock
parenta3caa2d3bbe791c39af2b56ae6f94ec83c4e09e2 (diff)
downloadcoreboot-425e75a2db999d65400b49ebe65ae26c64aabcd9.tar.xz
sb/intel/i82801gx: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB
Use common code to detect ACPI S3. Tested on Thinkpad X60. Change-Id: Ia759a9ed141efc8130860300f2a8961f0c084d70 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32041 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/asrock')
-rw-r--r--src/mainboard/asrock/g41c-gs/romstage.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/asrock/g41c-gs/romstage.c b/src/mainboard/asrock/g41c-gs/romstage.c
index 8cf34879dd..de73d016d3 100644
--- a/src/mainboard/asrock/g41c-gs/romstage.c
+++ b/src/mainboard/asrock/g41c-gs/romstage.c
@@ -23,6 +23,7 @@
#include <northbridge/intel/x4x/iomap.h>
#include <northbridge/intel/x4x/x4x.h>
#include <southbridge/intel/common/gpio.h>
+#include <southbridge/intel/common/pmclib.h>
#include <southbridge/intel/i82801gx/i82801gx.h>
#include <superio/nuvoton/common/nuvoton.h>
#include <superio/nuvoton/nct6776/nct6776.h>