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authorAngel Pons <th3fanbus@gmail.com>2020-05-20 23:34:54 +0200
committerNico Huber <nico.h@gmx.de>2020-05-26 11:32:13 +0000
commit66ee42daba635a0748262092b28a3ee87bbfd573 (patch)
tree2bd3dc4ce21bfd183c66681d908fd1cd392288ff /src/mainboard/asrock
parent927f6ae84a7b59b630250a7e559aac1eb05ae2f5 (diff)
downloadcoreboot-66ee42daba635a0748262092b28a3ee87bbfd573.tar.xz
mb/*/*/buildOpts.c: Clean up whitespace
Drop multiple blank lines and use one space inside C-style comments. TEST=Use abuild --timeless to check that all AGESA f14/f15tn/f16kb mainboards result in identical coreboot binaries. Change-Id: Ibe1f279dd22ae7657ea7b7766f88004dbf4dceb5 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41589 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mike Banon <mikebdp2@gmail.com> Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Diffstat (limited to 'src/mainboard/asrock')
-rw-r--r--src/mainboard/asrock/e350m1/buildOpts.c9
-rw-r--r--src/mainboard/asrock/imb-a180/buildOpts.c9
2 files changed, 6 insertions, 12 deletions
diff --git a/src/mainboard/asrock/e350m1/buildOpts.c b/src/mainboard/asrock/e350m1/buildOpts.c
index 1e644c5bc0..b49376ecbf 100644
--- a/src/mainboard/asrock/e350m1/buildOpts.c
+++ b/src/mainboard/asrock/e350m1/buildOpts.c
@@ -9,19 +9,17 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
- *
*/
#include <AGESA.h>
-
-/* Select the CPU family. */
+/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE
#define INSTALL_FAMILY_14_SUPPORT TRUE
#define INSTALL_FAMILY_15_SUPPORT FALSE
-/* Select the CPU socket type. */
+/* Select the CPU socket type. */
#define INSTALL_G34_SOCKET_SUPPORT FALSE
#define INSTALL_C32_SOCKET_SUPPORT FALSE
#define INSTALL_S1G3_SOCKET_SUPPORT FALSE
@@ -86,7 +84,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
-
/*
* Agesa configuration values selection.
* Uncomment and specify the value for the configuration options
@@ -206,7 +203,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
#define BLDCFG_HEAP_DRAM_ADDRESS 0xB0000
#define BLDCFG_CFG_TEMP_PCIE_MMIO_BASE_ADDRESS 0xD0000000
-/* Include the files that instantiate the configuration definitions. */
+/* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h"
#include "cpuFamRegisters.h"
#include "cpuFamilyTranslation.h"
diff --git a/src/mainboard/asrock/imb-a180/buildOpts.c b/src/mainboard/asrock/imb-a180/buildOpts.c
index 9fc4a43fc3..78a4082038 100644
--- a/src/mainboard/asrock/imb-a180/buildOpts.c
+++ b/src/mainboard/asrock/imb-a180/buildOpts.c
@@ -9,7 +9,6 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
- *
*/
#include <AGESA.h>
@@ -29,7 +28,6 @@
#define INSTALL_AM3_SOCKET_SUPPORT FALSE
#define INSTALL_FM2_SOCKET_SUPPORT FALSE
-
#ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT
#if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE
#undef INSTALL_FT3_SOCKET_SUPPORT
@@ -152,7 +150,7 @@
#define BLDCFG_PROCESSOR_SCOPE_NAME1 '0'
#define BLDCFG_PCIE_TRAINING_ALGORITHM PcieTrainingDistributed
-/* Process the options...
+/* Process the options...
* This file include MUST occur AFTER the user option selection settings
*/
/*
@@ -214,8 +212,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
#define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList
-
-/* Include the files that instantiate the configuration definitions. */
+/* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h"
#include "cpuFamRegisters.h"
#include "cpuFamilyTranslation.h"
@@ -250,7 +247,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
//#define DDR2400_FREQUENCY 1200 ///< DDR 2400
//#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
//
-///* QUANDRANK_TYPE*/
+///* QUANDRANK_TYPE */
//#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
//#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
//