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authorAngel Pons <th3fanbus@gmail.com>2021-03-12 18:19:21 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-03-23 10:59:40 +0000
commit36714d9fe6adc4e27ea3e98d2b4743087b0e2b4c (patch)
treeef584ee2cabf0c681a7d60cb8f50ac196a407a6c /src/mainboard/asrock
parentc4ee714881c7f7bb7a9208b39c76d98578c434b1 (diff)
downloadcoreboot-36714d9fe6adc4e27ea3e98d2b4743087b0e2b4c.tar.xz
haswell boards: Use zero length for disabled USB ports
For disabled USB ports, the length setting does not matter. In future commits, disabled USB ports will end up with length field set to zero. Change-Id: I7613e1b0c89c0b58eca790ca14fcd1633c8a93af Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51450 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
Diffstat (limited to 'src/mainboard/asrock')
-rw-r--r--src/mainboard/asrock/h81m-hds/romstage.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/asrock/h81m-hds/romstage.c b/src/mainboard/asrock/h81m-hds/romstage.c
index a5b667f053..faac6809e3 100644
--- a/src/mainboard/asrock/h81m-hds/romstage.c
+++ b/src/mainboard/asrock/h81m-hds/romstage.c
@@ -31,14 +31,14 @@ const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
{ 0x0040, 1, 1, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 2, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 2, USB_PORT_BACK_PANEL },
- { 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
- { 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
+ { 0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
+ { 0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
{ 0x0040, 1, 4, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 4, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 5, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 5, USB_PORT_BACK_PANEL },
- { 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
- { 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
+ { 0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
+ { 0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
};
const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {