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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-06-16 17:24:14 +1000
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-06-18 21:17:27 +0200
commitc94d73e0e6703369831fe6d489a20d71ab2bb974 (patch)
treec02321f3815f217665c57fd159fb43b2a1e47788 /src/mainboard/asrock
parent401b8accf8fdade02f40f528812ac081c7a0f432 (diff)
downloadcoreboot-c94d73e0e6703369831fe6d489a20d71ab2bb974.tar.xz
mainboard: Clear up remaining SIO_PORT from Kconfig
Push back any board specific values back into romstage.c #defines and drop any remaining fragments of CONFIG_SIO_PORT in-tree. Change-Id: Ieb63fb0c2ab1a82b53bafd86686de7b21ac226c3 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6045 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/asrock')
-rw-r--r--src/mainboard/asrock/e350m1/Kconfig4
-rw-r--r--src/mainboard/asrock/e350m1/romstage.c2
2 files changed, 1 insertions, 5 deletions
diff --git a/src/mainboard/asrock/e350m1/Kconfig b/src/mainboard/asrock/e350m1/Kconfig
index 956bb3ce5b..00cdaa735c 100644
--- a/src/mainboard/asrock/e350m1/Kconfig
+++ b/src/mainboard/asrock/e350m1/Kconfig
@@ -69,10 +69,6 @@ config RAMBASE
hex
default 0x200000
-config SIO_PORT
- hex
- default 0x2e
-
config ONBOARD_VGA_IS_PRIMARY
bool
default y
diff --git a/src/mainboard/asrock/e350m1/romstage.c b/src/mainboard/asrock/e350m1/romstage.c
index 2913c08da0..5c2f86747f 100644
--- a/src/mainboard/asrock/e350m1/romstage.c
+++ b/src/mainboard/asrock/e350m1/romstage.c
@@ -39,7 +39,7 @@
#include "SBPLATFORM.h"
-#define SERIAL_DEV PNP_DEV(CONFIG_SIO_PORT, W83627HF_SP1)
+#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{