diff options
| author | Jens Rottmann <JRottmann@LiPPERTembedded.de> | 2013-02-18 18:56:48 +0100 |
|---|---|---|
| committer | Peter Stuge <peter@stuge.se> | 2013-02-19 19:50:33 +0100 |
| commit | f87855ceab7e735221c1b85ed405a0b47e329125 (patch) | |
| tree | 41f2a2b94aa37fea8a5857129c3268243e624737 /src/mainboard/asrock | |
| parent | 46cb96bb887c88ab0c03dc83ebd6ba107a5d908c (diff) | |
| download | coreboot-f87855ceab7e735221c1b85ed405a0b47e329125.tar.xz | |
Inagua+children: fix simple copy & paste error in code to reset PCIe slots
Looking at AssertSlotReset, the comments and all other case's it's
obvious this is a simple copy & paste error where someone just forgot
to change one occurrance of the GPIO nr. Also the AMD Inagua
schematics show that GPIO02 is what they really meant.
Also forward the fix to boards copied from Inagua (AMD South
Station, Union Station, Asrock E350M1).
Change-Id: I6b9a3d473245fa27604b2f148a730290277a88ed
Signed-off-by: Jens Rottmann <JRottmann@LiPPERTembedded.de>
Reviewed-on: http://review.coreboot.org/2445
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
Diffstat (limited to 'src/mainboard/asrock')
| -rw-r--r-- | src/mainboard/asrock/e350m1/BiosCallOuts.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/asrock/e350m1/BiosCallOuts.c b/src/mainboard/asrock/e350m1/BiosCallOuts.c index 2d6c9e0105..8aa43987c2 100644 --- a/src/mainboard/asrock/e350m1/BiosCallOuts.c +++ b/src/mainboard/asrock/e350m1/BiosCallOuts.c @@ -592,7 +592,7 @@ AGESA_STATUS BiosGnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr) Status = AGESA_SUCCESS; break; case DeassertSlotReset: - Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25); + Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02); Data8 |= BIT6 ; Write64Mem8 (GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02 Status = AGESA_SUCCESS; |