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authorAlexandru Gagniuc <mr.nuke.me@gmail.com>2014-04-14 16:44:19 -0500
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2014-04-16 22:29:33 +0200
commit342ac64a5d6f5ab639fb140ae69f9b3597878cba (patch)
tree947888041e91888f845a3ee99cc2f6d34690299f /src/mainboard/asrock
parentf3e82f7969ac191f1b47864b6d5325bd6d8dd485 (diff)
downloadcoreboot-342ac64a5d6f5ab639fb140ae69f9b3597878cba.tar.xz
southbridge/hudson: Use MMIO instead of PIO to access PM space
The MMIO region is set up by AGESA very early on, so we can use it to access the PM register space in ramstage. 16-bit accessors are also provided to simplify some setup tasks. 16-bit accesses are not possible via PIO. The pm2_iowrite/read accessors are removed, as they are not used. Change-Id: Ie7967b5086eb004525c39721338c6495aedc8165 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/5503 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@gmail.com>
Diffstat (limited to 'src/mainboard/asrock')
-rw-r--r--src/mainboard/asrock/imb-a180/mptable.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/asrock/imb-a180/mptable.c b/src/mainboard/asrock/imb-a180/mptable.c
index 83c0b41108..b639beb013 100644
--- a/src/mainboard/asrock/imb-a180/mptable.c
+++ b/src/mainboard/asrock/imb-a180/mptable.c
@@ -96,10 +96,10 @@ static void *smp_write_config_table(void *v)
/* I/O APICs: APIC ID Version State Address */
dword = 0;
- dword = pm_ioread(0x34) & 0xF0;
- dword |= (pm_ioread(0x35) & 0xFF) << 8;
- dword |= (pm_ioread(0x36) & 0xFF) << 16;
- dword |= (pm_ioread(0x37) & 0xFF) << 24;
+ dword = pm_read8(0x34) & 0xF0;
+ dword |= (pm_read8(0x35) & 0xFF) << 8;
+ dword |= (pm_read8(0x36) & 0xFF) << 16;
+ dword |= (pm_read8(0x37) & 0xFF) << 24;
/* Set IO APIC ID onto IO_APIC_ID */
write32 (dword, 0x00);
write32 (dword + 0x10, IO_APIC_ID << 24);