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authorArthur Heymans <arthur@aheymans.xyz>2017-06-21 14:44:13 +0200
committerArthur Heymans <arthur@aheymans.xyz>2017-12-11 11:58:02 +0000
commit6d1fdb34105a6ed894ce0aba85b9fb2eb3cf9d33 (patch)
treecec8664e1a377809578ef6cc9eb5369b08454c44 /src/mainboard/asrock
parentf6bbc603fadf4fdb6c9c86775739ff1b32ab5f1e (diff)
downloadcoreboot-6d1fdb34105a6ed894ce0aba85b9fb2eb3cf9d33.tar.xz
AMD fam10: Link southbridge/amd/rs780/early_setup.c
Removes rs780_before_pci_init() since it was a no-op anyway. Removes get_nb_rev() since this function is provided via a macro in the header. This Makes a lot of function non-static since the header has prototypes for these. Change-Id: I8933516771d959583bbd59a5c1beee3e30a7004f Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/20297 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/asrock')
-rw-r--r--src/mainboard/asrock/939a785gmh/romstage.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/asrock/939a785gmh/romstage.c b/src/mainboard/asrock/939a785gmh/romstage.c
index 135db10dd2..d6a85ccee8 100644
--- a/src/mainboard/asrock/939a785gmh/romstage.c
+++ b/src/mainboard/asrock/939a785gmh/romstage.c
@@ -49,7 +49,7 @@ int spd_read_byte(u32 device, u32 address)
return do_smbus_read_byte(SMBUS_IO_BASE, device, address);
}
-#include "southbridge/amd/rs780/early_setup.c"
+#include <southbridge/amd/rs780/rs780.h>
#include <northbridge/amd/amdk8/amdk8.h>
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "northbridge/amd/amdk8/raminit.c"
@@ -208,6 +208,5 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr);
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
- rs780_before_pci_init();
sb7xx_51xx_before_pci_init();
}