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authorMaxim Polyakov <max.senia.poliak@gmail.com>2020-02-23 10:51:00 +0300
committerPatrick Georgi <pgeorgi@google.com>2020-03-03 10:21:15 +0000
commitf0303dbf919e1a207f2f689e5b344f8e4cee0ab4 (patch)
treeb8980457a557140f98903c92730cc5f94d808304 /src/mainboard/asrock
parent7b98e3ebfc3ac12972ba36418f5de7595cc2fb8f (diff)
downloadcoreboot-f0303dbf919e1a207f2f689e5b344f8e4cee0ab4.tar.xz
mb/asrock/h110m: Explain why some SATA ports are empty
Change-Id: Ib0a24fab22ee082367b82b3e8ee7383f1f02a4ad Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39119 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/asrock')
-rw-r--r--src/mainboard/asrock/h110m/devicetree.cb7
1 files changed, 5 insertions, 2 deletions
diff --git a/src/mainboard/asrock/h110m/devicetree.cb b/src/mainboard/asrock/h110m/devicetree.cb
index fa94dd9e5b..d42d91e556 100644
--- a/src/mainboard/asrock/h110m/devicetree.cb
+++ b/src/mainboard/asrock/h110m/devicetree.cb
@@ -180,6 +180,11 @@ chip soc/intel/skylake
# SATA
register "EnableSata" = "1"
register "SataSalpSupport" = "1"
+ # SATA4 and SATA5 are located in the lower right corner of the board,
+ # but they are not populated. This is because the same PCB is used to
+ # make boards with better PCHs, which can have up to six SATA ports.
+ # However, the H110 PCH only has four SATA ports, which explains why
+ # two connectors are missing.
register "SataPortsEnable" = "{ \
[0] = 1, \
[1] = 1, \
@@ -190,8 +195,6 @@ chip soc/intel/skylake
[6] = 0, \
[7] = 0, \
}"
- # SATA4 and SATA5 are located in the lower right corner
- # of the board, but there is no connector for this
# PCH UART, SPI, I2C
register "SerialIoDevMode" = "{ \