diff options
| author | Tobias Diedrich <ranma+coreboot@tdiedrich.de> | 2010-11-17 11:02:05 +0000 |
|---|---|---|
| committer | Rudolf Marek <r.marek@assembler.cz> | 2010-11-17 11:02:05 +0000 |
| commit | e0c0a82954978747aa68eceb19709d93a019829d (patch) | |
| tree | 33656345ca40e4bbe96b92b21e1e1be586124975 /src/mainboard/asrock | |
| parent | 8a71dcd3212fb438ffd725f4b09fa1bb831ee904 (diff) | |
| download | coreboot-e0c0a82954978747aa68eceb19709d93a019829d.tar.xz | |
This problem was introduced with
http://tracker.coreboot.org/trac/coreboot/changeset/3953
Note that all corresponding DSDTs only ever check TOM2 against 0.
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Acked-by: Rudolf Marek <r.marek@assembler.cz>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6082 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/asrock')
| -rw-r--r-- | src/mainboard/asrock/939a785gmh/dsdt.asl | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/mainboard/asrock/939a785gmh/dsdt.asl b/src/mainboard/asrock/939a785gmh/dsdt.asl index 9d6c8bfa79..9f9b8c8f39 100644 --- a/src/mainboard/asrock/939a785gmh/dsdt.asl +++ b/src/mainboard/asrock/939a785gmh/dsdt.asl @@ -1122,7 +1122,7 @@ DefinitionBlock ( /* Note: Only need HID on Primary Bus */ Device(PCI0) { External (TOM1) - External (TOM2) + External (TOM2) /* (<real tom2> >> 20) to make it fit into 32 bit for XP */ Name(_HID, EISAID("PNP0A03")) Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Method(_BBN, 0) { /* Bus number = 0 */ @@ -1530,7 +1530,8 @@ DefinitionBlock ( /* * If(LNotEqual(TOM2, 0x00000000)){ * Store(0x100000000,DMHB) DRAM from 4GB to TopMem2 - * Subtract(TOM2, 0x100000000, DMHL) + * ShiftLeft(TOM2, 20, Local0) + * Subtract(Local0, 0x100000000, DMHL) * } */ |