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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-06-19 23:12:15 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-07-03 09:47:48 +0200 |
commit | 005028e0a952b00b6184cdddf5905a1637029585 (patch) | |
tree | 75bf8496298c783731502d9444a6a064d3e9203e /src/mainboard/asrock | |
parent | e1b468e1a7cbea55108fb106105612e1f50c9487 (diff) | |
download | coreboot-005028e0a952b00b6184cdddf5905a1637029585.tar.xz |
AGESA: Add agesawrapper_post_device()
NOTE: The procedure is moved across a collected timestamp
TS_WRITE_TABLES, so the delay of SPI erase/write will be accounted
for in an earlier entry in cbmem -t output.
Change-Id: I0f082e7af1769c8d7d03cdd51fdb5dacbf3402b4
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6132
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/mainboard/asrock')
-rw-r--r-- | src/mainboard/asrock/e350m1/agesawrapper.h | 1 | ||||
-rw-r--r-- | src/mainboard/asrock/e350m1/get_bus_conf.c | 21 | ||||
-rw-r--r-- | src/mainboard/asrock/imb-a180/get_bus_conf.c | 35 |
3 files changed, 1 insertions, 56 deletions
diff --git a/src/mainboard/asrock/e350m1/agesawrapper.h b/src/mainboard/asrock/e350m1/agesawrapper.h index 10158f6454..b503559207 100644 --- a/src/mainboard/asrock/e350m1/agesawrapper.h +++ b/src/mainboard/asrock/e350m1/agesawrapper.h @@ -84,4 +84,5 @@ UINT32 agesawrapper_amdinitcpuio (void); UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); void *agesawrapper_getlateinitptr (int pick); +static inline UINT32 agesawrapper_amdS3Save(void) { return 0; } #endif diff --git a/src/mainboard/asrock/e350m1/get_bus_conf.c b/src/mainboard/asrock/e350m1/get_bus_conf.c index df8ce6e514..6a3d23250c 100644 --- a/src/mainboard/asrock/e350m1/get_bus_conf.c +++ b/src/mainboard/asrock/e350m1/get_bus_conf.c @@ -55,7 +55,6 @@ static u32 get_bus_conf_done = 0; void get_bus_conf(void) { u32 apicid_base; - u32 status; device_t dev; int i, j; @@ -65,26 +64,6 @@ void get_bus_conf(void) get_bus_conf_done = 1; -/* - * This is the call to AmdInitLate. It is really in the wrong place, conceptually, - * but functionally within the coreboot model, this is the best place to make the - * call. The logically correct place to call AmdInitLate is after PCI scan is done, - * after the decision about S3 resume is made, and before the system tables are - * written into RAM. The routine that is responsible for writing the tables is - * "write_tables", called near the end of "main". There is no platform - * specific entry point between the S3 resume decision point and the call to - * "write_tables", and the next platform specific entry points are the calls to - * the ACPI table write functions. The first of ose would seem to be the right - * place, but other table write functions, e.g. the PIRQ table write function, are - * called before the ACPI tables are written. This routine is called at the beginning - * of each of the write functions called prior to the ACPI write functions, so this - * becomes the best place for this call. - */ - status = agesawrapper_amdinitlate(); - if(status) { - printk(BIOS_DEBUG, "agesawrapper_amdinitlate failed: %x \n", status); - } - sbdn_sb800 = 0; memset(bus_sb800, 0, sizeof(bus_sb800)); diff --git a/src/mainboard/asrock/imb-a180/get_bus_conf.c b/src/mainboard/asrock/imb-a180/get_bus_conf.c index a380872566..226d57de91 100644 --- a/src/mainboard/asrock/imb-a180/get_bus_conf.c +++ b/src/mainboard/asrock/imb-a180/get_bus_conf.c @@ -47,13 +47,9 @@ u32 sbdn_yangtze; static u32 get_bus_conf_done = 0; -#if CONFIG_HAVE_ACPI_RESUME -extern u8 acpi_slp_type; -#endif void get_bus_conf(void) { u32 apicid_base; - u32 status; u32 value; device_t dev; @@ -64,37 +60,6 @@ void get_bus_conf(void) get_bus_conf_done = 1; - /* - * This is the call to AmdInitLate. It is really in the wrong place, conceptually, - * but functionally within the coreboot model, this is the best place to make the - * call. The logically correct place to call AmdInitLate is after PCI scan is done, - * after the decision about S3 resume is made, and before the system tables are - * written into RAM. The routine that is responsible for writing the tables is - * "write_tables", called near the end of "hardwaremain". There is no platform - * specific entry point between the S3 resume decision point and the call to - * "write_tables", and the next platform specific entry points are the calls to - * the ACPI table write functions. The first of ose would seem to be the right - * place, but other table write functions, e.g. the PIRQ table write function, are - * called before the ACPI tables are written. This routine is called at the beginning - * of each of the write functions called prior to the ACPI write functions, so this - * becomes the best place for this call. - */ -#if CONFIG_HAVE_ACPI_RESUME - if (acpi_slp_type != 3) { - status = agesawrapper_amdinitlate(); - if(status) { - printk(BIOS_DEBUG, "agesawrapper_amdinitlate failed: %x \n", status); - } - status = agesawrapper_amdS3Save(); - if (status) { - printk(BIOS_DEBUG, "agesawrapper_amds3save failed: %x \n", status); - } - } -#else - status = agesawrapper_amdinitlate(); - if (status) - printk(BIOS_DEBUG, "agesawrapper_amdinitlate failed: %x \n", status); -#endif dev = dev_find_slot(0, PCI_DEVFN(0, 0)); /* clear IoapicSbFeatureEn */ pci_write_config32(dev, 0xF8, 0); pci_write_config32(dev, 0xFC, 5); /* TODO: move it to dsdt.asl */ |