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authorAngel Pons <th3fanbus@gmail.com>2020-06-15 23:14:46 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-08 22:30:59 +0000
commit07e461f8eb8fa5610c10ee00e836d5cd0e1ad303 (patch)
tree9aedfb6fa49035f40fd55f64c882f97e632ebe7a /src/mainboard/asrock
parent456852f43773acdc52a3a3d3aec9ae3fe7aae18e (diff)
downloadcoreboot-07e461f8eb8fa5610c10ee00e836d5cd0e1ad303.tar.xz
mb/asrock/b85m_pro4: Correct Super I/O GPIOs
GPIO2 is not used as such, GPIO7 is though. Also relocate GPIO1 settings under the correct PnP device. Confirmed findings against boardviews. Change-Id: I4a88ac82d640ca709e7875b4d34b9babb1f2e0a4 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42400 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/asrock')
-rw-r--r--src/mainboard/asrock/b85m_pro4/devicetree.cb13
1 files changed, 7 insertions, 6 deletions
diff --git a/src/mainboard/asrock/b85m_pro4/devicetree.cb b/src/mainboard/asrock/b85m_pro4/devicetree.cb
index 0655a328ff..54234e02e6 100644
--- a/src/mainboard/asrock/b85m_pro4/devicetree.cb
+++ b/src/mainboard/asrock/b85m_pro4/devicetree.cb
@@ -80,20 +80,21 @@ chip northbridge/intel/haswell
device pnp 2e.108 on # GPIO0
irq 0xe0 = 0xf9 # + GPIO0 direction
irq 0xe1 = 0xfb # + GPIO0 value
- irq 0xf0 = 0xf1 # + GPIO1 direction
- irq 0xf1 = 0xf1 # + GPIO1 value
end
device pnp 2e.208 off end # GPIOA
device pnp 2e.308 off end # GPIO base
- device pnp 2e.109 on end # GPIO1
- device pnp 2e.209 on # GPIO2
- irq 0xe0 = 0xff # + GPIO2 direction
+ device pnp 2e.109 on # GPIO1
+ irq 0xf0 = 0xf1 # + GPIO1 direction
+ irq 0xf1 = 0xf1 # + GPIO1 value
end
+ device pnp 2e.209 off end # GPIO2
device pnp 2e.309 off end # GPIO3
device pnp 2e.409 off end # GPIO4
device pnp 2e.509 off end # GPIO5
device pnp 2e.609 off end # GPIO6
- device pnp 2e.709 off end # GPIO7
+ device pnp 2e.709 on # GPIO7
+ irq 0xe0 = 0xff # + GPIO7 direction
+ end
device pnp 2e.a on # ACPI
irq 0xe0 = 0x41 # + Enable KBC wakeup
irq 0xe4 = 0x10 # + Power RAM in S3