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| author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2017-03-29 17:09:37 +0200 |
|---|---|---|
| committer | Werner Zeh <werner.zeh@siemens.com> | 2017-04-04 06:44:47 +0200 |
| commit | 956a9f6a9cf0e51c9155738baa566b192897648f (patch) | |
| tree | c8ba5ccb412bbdc9e0657e58824613bf68cf5b77 /src/mainboard/asrock | |
| parent | 45ff9cbaa997ddf935cc028beaf66ba9fe0fea56 (diff) | |
| download | coreboot-956a9f6a9cf0e51c9155738baa566b192897648f.tar.xz | |
siemens/mc_apl1: Activate PTN3460 eDP to LVDS bridge IC
This mainboard uses a LVDS connection for LCD panels. Apollo Lake SoC
provides a display controller with three independent pipes (1x eDP and
2x DP/HDMI). PTN3460 is an embedded DisplayPort to LVDS bridge device
that enables connectivity between an eDP source and LVDS display panel
(http://www.nxp.com/documents/data_sheet/PTN3460.pdf).
The bridge contains an On-chip Extended Display Identification Data
(EDIT) emulation for EDIT data structures.
This patch sets up PTN3460 to be used with the appropriate LCD panel.
Change-Id: Ib8fa79bb608f1842f26c1af3d7bf4bb0513fa94d
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/19043
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/asrock')
0 files changed, 0 insertions, 0 deletions