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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-04-22 16:46:31 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-04-28 18:36:35 +0200 |
commit | 2458f42b27e6525f4131899ef36f21d0f7dace1a (patch) | |
tree | b3f5ece33c604ddc9638da1f192b3e8361216d65 /src/mainboard/asrock | |
parent | cf7b4989083cb3fd1adf34dc5e07d4ac253e8f85 (diff) | |
download | coreboot-2458f42b27e6525f4131899ef36f21d0f7dace1a.tar.xz |
AMD: Add common header file for CAR setup
Change-Id: I24b2cbd671ac3a463562d284f06258140a019a37
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/4683
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/asrock')
-rw-r--r-- | src/mainboard/asrock/e350m1/romstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/asrock/imb-a180/romstage.c | 3 |
2 files changed, 2 insertions, 3 deletions
diff --git a/src/mainboard/asrock/e350m1/romstage.c b/src/mainboard/asrock/e350m1/romstage.c index bf850a30c8..cbfa7434d3 100644 --- a/src/mainboard/asrock/e350m1/romstage.c +++ b/src/mainboard/asrock/e350m1/romstage.c @@ -29,6 +29,7 @@ #include <console/console.h> #include <console/loglevel.h> #include <cpu/x86/mtrr.h> +#include "cpu/amd/car.h" #include "agesawrapper.h" #include "cpu/x86/bist.h" #include "superio/winbond/w83627hf/early_serial.c" @@ -38,7 +39,6 @@ #include <sb_cimx.h> #include "SBPLATFORM.h" -void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx); #define SERIAL_DEV PNP_DEV(CONFIG_SIO_PORT, W83627HF_SP1) diff --git a/src/mainboard/asrock/imb-a180/romstage.c b/src/mainboard/asrock/imb-a180/romstage.c index 9b069b77ce..59d95f9e0f 100644 --- a/src/mainboard/asrock/imb-a180/romstage.c +++ b/src/mainboard/asrock/imb-a180/romstage.c @@ -28,6 +28,7 @@ #include <cpu/x86/lapic.h> #include <console/console.h> #include <console/loglevel.h> +#include "cpu/amd/car.h" #include "agesawrapper.h" #include "cpu/x86/bist.h" #include "cpu/x86/lapic.h" @@ -40,8 +41,6 @@ #define SERIAL_DEV PNP_DEV(0x2e, W83627UHG_SP1) -void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx); -void disable_cache_as_ram(void); void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { |