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authorStefan Reinauer <stepan@coresystems.de>2010-03-31 14:47:43 +0000
committerStefan Reinauer <stepan@openbios.org>2010-03-31 14:47:43 +0000
commit64ed2b73451de4b655b3fdda0ff42825a165c317 (patch)
tree0faaae313a9a9edbf8b33f56fc18830ba14aa75f /src/mainboard/asus/a8v-e_se
parent5a1f5970857a5ad1fda0cf9d5945192408bf537b (diff)
downloadcoreboot-64ed2b73451de4b655b3fdda0ff42825a165c317.tar.xz
Drop \r\n and \n\r as both print_XXX and printk now do this internally.
Only some assembler files still have \r\n ... Can we move that part to C completely? Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5342 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/asus/a8v-e_se')
-rw-r--r--src/mainboard/asus/a8v-e_se/romstage.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/asus/a8v-e_se/romstage.c b/src/mainboard/asus/a8v-e_se/romstage.c
index c2390c76d1..7f57ddcb1c 100644
--- a/src/mainboard/asus/a8v-e_se/romstage.c
+++ b/src/mainboard/asus/a8v-e_se/romstage.c
@@ -89,7 +89,7 @@ void soft_reset(void)
uint8_t tmp;
set_bios_reset();
- print_debug("soft reset \r\n");
+ print_debug("soft reset \n");
/* PCI reset */
tmp = pci_read_config8(PCI_DEV(0, 0x11, 0), 0x4f);
@@ -195,7 +195,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
console_init();
enable_rom_decode();
- print_info("now booting... fallback\r\n");
+ print_info("now booting... fallback\n");
/* Is this a CPU only reset? Or is this a secondary CPU? */
if (!cpu_init_detectedx && boot_cpu()) {
@@ -210,7 +210,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
console_init();
enable_rom_decode();
- print_info("now booting... real_main\r\n");
+ print_info("now booting... real_main\n");
if (bist == 0)
bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
@@ -222,7 +222,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
setup_coherent_ht_domain();
wait_all_core0_started();
- print_info("now booting... Core0 started\r\n");
+ print_info("now booting... Core0 started\n");
#if CONFIG_LOGICAL_CPUS==1
/* It is said that we should start core1 after all core0 launched. */
@@ -237,7 +237,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
needs_reset |= k8t890_early_setup_ht();
if (needs_reset) {
- print_debug("ht reset -\r\n");
+ print_debug("ht reset -\n");
soft_reset();
}