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authorMartin Roth <gaumless@gmail.com>2017-10-15 14:58:49 -0600
committerMartin Roth <martinroth@google.com>2018-01-15 23:24:53 +0000
commitf6af8943e23b8ffa27df6ddb8e4a654387be0cb6 (patch)
treed5b2cab4d1ba2b8de91fd1abedf07033a429b19a /src/mainboard/asus/dsbf/cmos.layout
parent779b32beffae83ece727a43f2ce216513bf66c15 (diff)
downloadcoreboot-f6af8943e23b8ffa27df6ddb8e4a654387be0cb6.tar.xz
Intel i5000 board & chips: Remove - using LATE_CBMEM_INIT
All boards and chips that are still using LATE_CBMEM_INIT are being removed as previously discussed. If these boards and chips are updated to not use LATE_CBMEM_INIT, they can be restored to the active codebase from the 4.7 branch. chips: northbridge/intel/i5000 Mainboards: mainboard/supermicro/x7db8 mainboard/asus/dsbf Change-Id: I6614c0033b4439d196f26819998d3f85e6d11c00 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/22030 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/asus/dsbf/cmos.layout')
-rw-r--r--src/mainboard/asus/dsbf/cmos.layout104
1 files changed, 0 insertions, 104 deletions
diff --git a/src/mainboard/asus/dsbf/cmos.layout b/src/mainboard/asus/dsbf/cmos.layout
deleted file mode 100644
index 6f5898e171..0000000000
--- a/src/mainboard/asus/dsbf/cmos.layout
+++ /dev/null
@@ -1,104 +0,0 @@
-#
-# This file is part of the coreboot project.
-#
-# Copyright (C) 2007-2008 coresystems GmbH
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; version 2 of
-# the License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-
-# -----------------------------------------------------------------
-entries
-
-# -----------------------------------------------------------------
-# Status Register A
-# -----------------------------------------------------------------
-# Status Register B
-# -----------------------------------------------------------------
-# Status Register C
-#96 4 r 0 status_c_rsvd
-#100 1 r 0 uf_flag
-#101 1 r 0 af_flag
-#102 1 r 0 pf_flag
-#103 1 r 0 irqf_flag
-# -----------------------------------------------------------------
-# Status Register D
-#104 7 r 0 status_d_rsvd
-#111 1 r 0 valid_cmos_ram
-# -----------------------------------------------------------------
-# Diagnostic Status Register
-#112 8 r 0 diag_rsvd1
-
-# -----------------------------------------------------------------
-0 120 r 0 reserved_memory
-#120 264 r 0 unused
-
-# -----------------------------------------------------------------
-# RTC_BOOT_BYTE (coreboot hardcoded)
-384 1 e 4 boot_option
-388 4 h 0 reboot_counter
-#390 2 r 0 unused?
-
-# -----------------------------------------------------------------
-# coreboot config options: console
-#392 3 r 0 unused
-395 4 e 6 debug_level
-#399 1 r 0 unused
-
-# coreboot config options: cpu
-400 1 e 2 hyper_threading
-#401 7 r 0 unused
-
-# coreboot config options: southbridge
-408 1 e 1 nmi
-#409 2 e 7 power_on_after_fail
-#411 5 r 0 unused
-
-# coreboot config options: bootloader
-416 512 s 0 boot_devices
-928 8 h 0 boot_default
-936 1 e 8 cmos_defaults_loaded
-937 1 e 1 lpt
-#938 46 r 0 unused
-
-# coreboot config options: check sums
-984 16 h 0 check_sum
-
-# -----------------------------------------------------------------
-
-enumerations
-
-#ID value text
-1 0 Disable
-1 1 Enable
-2 0 Enable
-2 1 Disable
-4 0 Fallback
-4 1 Normal
-6 1 Emergency
-6 2 Alert
-6 3 Critical
-6 4 Error
-6 5 Warning
-6 6 Notice
-6 7 Info
-6 8 Debug
-6 9 Spew
-7 0 Disable
-7 1 Enable
-7 2 Keep
-8 0 No
-8 1 Yes
-9 0 Secondary
-9 1 Primary
-# -----------------------------------------------------------------
-checksums
-
-checksum 392 983 984