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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-05-23 14:27:44 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-05-24 05:34:13 +0200 |
| commit | 9d035fa1f7021fda52cd56aede406de7b780dfa8 (patch) | |
| tree | facbfcbbfbf835d737a6ef90128facfff2457f89 /src/mainboard/asus/f2a85-m | |
| parent | 7fb149dce1d13be7dfae8ec1babb000ef18d2d94 (diff) | |
| download | coreboot-9d035fa1f7021fda52cd56aede406de7b780dfa8.tar.xz | |
AGESA binaryPI boards: Drop annoying commentary
Same comments were already removed for the latest board, the amd/lamar.
Change-Id: Ie244f838409c567c11f7444c9cf17de72e49dbb0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/10283
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
Diffstat (limited to 'src/mainboard/asus/f2a85-m')
| -rw-r--r-- | src/mainboard/asus/f2a85-m/PlatformGnbPcie.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/asus/f2a85-m/PlatformGnbPcie.c b/src/mainboard/asus/f2a85-m/PlatformGnbPcie.c index f2ab1cb4af..cbb5c9aa66 100644 --- a/src/mainboard/asus/f2a85-m/PlatformGnbPcie.c +++ b/src/mainboard/asus/f2a85-m/PlatformGnbPcie.c @@ -74,19 +74,19 @@ static const PCIe_PORT_DESCRIPTOR PortList [] = { /* PCIe port, Lanes 8:23, PCI Device Number 2, blue x16 slot */ { - 0, /* Descriptor flags */ + 0, PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 8, 23), PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 2, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 1) }, /* PCIe port, Lanes 4:7, PCI Device Number 4, black x16 slot (in fact x4) */ { - 0, /* Descriptor flags */ + 0, PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 4, 7), PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 4, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 1) }, /* PCIe port, Lanes 0:3, UMI link to SB, PCI Device Number 8 */ { - DESCRIPTOR_TERMINATE_LIST, /* Descriptor flags !!!IMPORTANT!!! Terminate last element of array */ + DESCRIPTOR_TERMINATE_LIST, PCIE_ENGINE_DATA_INITIALIZER (PciePortEngine, 0, 3), PCIE_PORT_DATA_INITIALIZER (PortEnabled, ChannelTypeExt6db, 8, HotplugDisabled, PcieGenMaxSupported, PcieGenMaxSupported, AspmDisabled, 0) }, |