diff options
author | Angel Pons <th3fanbus@gmail.com> | 2021-05-17 16:18:09 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2021-05-20 17:48:29 +0000 |
commit | 741856f7c8d1364444c98954a7efd67aa8fc5098 (patch) | |
tree | 495aa9bb95bc9b8f8dd020560845e9cbe1608e8d /src/mainboard/asus/h61-series/variants/h61m-cs/overridetree.cb | |
parent | 901354b9f0bd9234e092891b8854abd20de48714 (diff) | |
download | coreboot-741856f7c8d1364444c98954a7efd67aa8fc5098.tar.xz |
mb/asus/h61m-cs: Switch to overridetree setup
Tested with BUILD_TIMELESS=1, coreboot.rom for the Asus H61M-CS
remains identical when not adding the .config file in it.
Change-Id: I34eb5387fddcb3505c9218b20b706b773e979b0e
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54389
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/asus/h61-series/variants/h61m-cs/overridetree.cb')
-rw-r--r-- | src/mainboard/asus/h61-series/variants/h61m-cs/overridetree.cb | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/src/mainboard/asus/h61-series/variants/h61m-cs/overridetree.cb b/src/mainboard/asus/h61-series/variants/h61m-cs/overridetree.cb new file mode 100644 index 0000000000..89ef4194b6 --- /dev/null +++ b/src/mainboard/asus/h61-series/variants/h61m-cs/overridetree.cb @@ -0,0 +1,60 @@ +## SPDX-License-Identifier: GPL-2.0-or-later + +chip northbridge/intel/sandybridge + device domain 0 on + subsystemid 0x1043 0x844d inherit + chip southbridge/intel/bd82x6x + register "gen1_dec" = "0x000c0291" + device pci 1b.0 on # High Definition Audio Audio controller + subsystemid 0x1043 0x8445 + end + device pci 1c.0 off end # PCIe Port #1 + device pci 1c.1 off end # PCIe Port #2 + device pci 1c.2 off end # PCIe Port #3 + device pci 1c.3 on end # PCIe x1 Slot 1 PCIE_1 + device pci 1c.4 on end # PCIe x1 Slot 2 PCIE_2 + device pci 1c.5 on # Realtek Gigabit NIC + device pci 00.0 on end + end + device pci 1c.6 off end # PCIe Port #7 + device pci 1c.7 off end # PCIe Port #8 + + device pci 1f.0 on # LPC bridge PCI-LPC bridge + chip superio/nuvoton/nct6779d + device pnp 2e.1 off end # Parallel + device pnp 2e.2 off end # UART A + device pnp 2e.3 off end # UART B, IR + device pnp 2e.5 on # Keyboard + io 0x60 = 0x0060 + io 0x62 = 0x0064 + irq 0x70 = 1 + irq 0x72 = 12 + end + device pnp 2e.6 off end # CIR + device pnp 2e.7 off end # GPIO6-8 + device pnp 2e.8 off end # WDT1, GPIO0, GPIO1 + device pnp 2e.108 off end # GPIO0 + device pnp 2e.9 off end # GPIO1-8 + device pnp 2e.109 on end # GPIO1 + device pnp 2e.209 on end # GPIO2 + device pnp 2e.309 on end # GPIO3 + device pnp 2e.409 off end # GPIO4 + device pnp 2e.509 on end # GPIO5 + device pnp 2e.609 off end # GPIO6 + device pnp 2e.709 off end # GPIO7 + device pnp 2e.a off end # ACPI + device pnp 2e.b on # H/W Monitor, FP LED + io 0x60 = 0x0290 + io 0x62 = 0 + irq 0x70 = 0 + end + device pnp 2e.d off end # WDT1 + device pnp 2e.e off end # CIR WAKE-UP + device pnp 2e.f off end # GPIO Push-pull/Open-drain selection + device pnp 2e.14 off end # PORT80 UART + device pnp 2e.16 off end # Deep Sleep + end + end + end + end +end |