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author | Angel Pons <th3fanbus@gmail.com> | 2021-05-17 13:22:57 +0200 |
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committer | David Hendricks <david.hendricks@gmail.com> | 2021-05-20 17:10:01 +0000 |
commit | ed1e25de525fe2649bf5af2b448f7b37e34c54f6 (patch) | |
tree | aa3f9f493ba748831c93fafd676388087f3c3d57 /src/mainboard/asus/h61-series/variants/p8h61-m_lx/early_init.c | |
parent | 9d8a4558e30845ff9ae421c551b4fa51dcfeec93 (diff) | |
download | coreboot-ed1e25de525fe2649bf5af2b448f7b37e34c54f6.tar.xz |
mb/asus/p8h61-m_lx: Transform into variant setup
Handle some differences in the DSDT code using preprocessor.
Tested with BUILD_TIMELESS=1, coreboot.rom for the Asus P8H61-M LX
remains identical when not adding the .config file in it.
Change-Id: I2a02f32dfd9fa9c1adce3baf0d279ea19db5883f
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54375
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Diffstat (limited to 'src/mainboard/asus/h61-series/variants/p8h61-m_lx/early_init.c')
-rw-r--r-- | src/mainboard/asus/h61-series/variants/p8h61-m_lx/early_init.c | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/src/mainboard/asus/h61-series/variants/p8h61-m_lx/early_init.c b/src/mainboard/asus/h61-series/variants/p8h61-m_lx/early_init.c new file mode 100644 index 0000000000..5e54d08e85 --- /dev/null +++ b/src/mainboard/asus/h61-series/variants/p8h61-m_lx/early_init.c @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <bootblock_common.h> +#include <device/dram/ddr3.h> +#include <northbridge/intel/sandybridge/raminit_native.h> +#include <southbridge/intel/bd82x6x/pch.h> +#include <superio/nuvoton/common/nuvoton.h> +#include <superio/nuvoton/nct6776/nct6776.h> + +#define SERIAL_DEV PNP_DEV(0x2e, NCT6776_SP1) + +const struct southbridge_usb_port mainboard_usb_ports[] = { + { 1, 0, 0 }, + { 1, 0, 0 }, + { 1, 0, 1 }, + { 1, 0, 1 }, + { 1, 0, 2 }, + { 1, 0, 2 }, + { 1, 0, 3 }, + { 1, 0, 3 }, + { 1, 0, 4 }, + { 1, 0, 4 }, + { 1, 0, 5 }, + { 1, 0, 5 }, + { 1, 0, 6 }, + { 1, 0, 6 }, +}; + +void bootblock_mainboard_early_init(void) +{ + nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); +} + +void mainboard_get_spd(spd_raw_data *spd, bool id_only) +{ + read_spd(&spd[0], 0x50, id_only); + read_spd(&spd[2], 0x52, id_only); +} |