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author | Arthur Heymans <arthur@aheymans.xyz> | 2017-03-28 11:50:10 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2017-04-27 10:18:28 +0200 |
commit | fb2f667da2091ce2194274f95c2d5db024d46e63 (patch) | |
tree | 5c9c72faf4d1279a5c6b64ca2ae8a1a879ac84aa /src/mainboard/asus/kfsn4-dre_k8/romstage.c | |
parent | c0f7a1b7d12062595f01442989e4eac2869e5b7a (diff) | |
download | coreboot-fb2f667da2091ce2194274f95c2d5db024d46e63.tar.xz |
nb/amd/amdk8: Link raminit_f.c
For this debug.c needs to be linked too.
Change-Id: I9cd1ffff2c39021693fe1d5d3f90ec5f70891f57
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19030
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/asus/kfsn4-dre_k8/romstage.c')
-rw-r--r-- | src/mainboard/asus/kfsn4-dre_k8/romstage.c | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/src/mainboard/asus/kfsn4-dre_k8/romstage.c b/src/mainboard/asus/kfsn4-dre_k8/romstage.c index d7bebbb702..c38164e12b 100644 --- a/src/mainboard/asus/kfsn4-dre_k8/romstage.c +++ b/src/mainboard/asus/kfsn4-dre_k8/romstage.c @@ -35,7 +35,7 @@ unsigned int get_sbdn(unsigned bus); #include "northbridge/amd/amdk8/reset_test.c" #include <cpu/x86/bist.h> #include <delay.h> -#include "northbridge/amd/amdk8/debug.c" + #include <cpu/amd/mtrr.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627thg/w83627thg.h> @@ -44,11 +44,9 @@ unsigned int get_sbdn(unsigned bus); #define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1) -static void memreset(int controllers, const struct mem_controller *ctrl) { } - -static void activate_spd_rom(const struct mem_controller *ctrl); +void memreset(int controllers, const struct mem_controller *ctrl) { } -static inline int spd_read_byte(unsigned device, unsigned address) +int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); } @@ -56,7 +54,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include <northbridge/amd/amdk8/amdk8.h> #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" -#include "northbridge/amd/amdk8/raminit_f.c" #include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" @@ -181,7 +178,8 @@ static const uint16_t spd_addr[] = { RC01 | DIMM0, RC01 | DIMM2, RC01 | DIMM4, RC01 | DIMM6, RC01 | DIMM1, RC01 | DIMM3, RC01 | DIMM5, RC01 | DIMM7, }; -static void activate_spd_rom(const struct mem_controller *ctrl) { +void activate_spd_rom(const struct mem_controller *ctrl) +{ printk(BIOS_DEBUG, "activate_spd_rom() for node %02x\n", ctrl->node_id); if (ctrl->node_id == 0) { printk(BIOS_DEBUG, "enable_spd_node0()\n"); |