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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-05-22 02:18:00 +0300 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2019-01-06 01:17:54 +0000 |
| commit | c70eed1e6202c928803f3e7f79161cd247a62b23 (patch) | |
| tree | e46a6c87f6f13b7719fd40a9360d8d03359bfffb /src/mainboard/asus/kgpe-d16/mptable.c | |
| parent | 54efaae701dacd58621e66a8cf56812eb5304946 (diff) | |
| download | coreboot-c70eed1e6202c928803f3e7f79161cd247a62b23.tar.xz | |
device: Use pcidev_on_root()
Change-Id: Icf34b39d80f6e46d32a39b68f38fb2752c0bcebc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/26484
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Piotr Król <piotr.krol@3mdeb.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/asus/kgpe-d16/mptable.c')
| -rw-r--r-- | src/mainboard/asus/kgpe-d16/mptable.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/mainboard/asus/kgpe-d16/mptable.c b/src/mainboard/asus/kgpe-d16/mptable.c index c1b2a5de5d..3b7ff52ab7 100644 --- a/src/mainboard/asus/kgpe-d16/mptable.c +++ b/src/mainboard/asus/kgpe-d16/mptable.c @@ -102,7 +102,7 @@ static void *smp_write_config_table(void *v) * 00:14.6: INTB MCI */ } - dev = dev_find_slot(0, PCI_DEVFN(0, 0)); + dev = pcidev_on_root(0, 0); if (dev) { pci_write_config32(dev, 0xF8, 0x1); dword_ptr = (u32 *)(pci_read_config32(dev, 0xFC) & 0xfffffff0); @@ -126,37 +126,37 @@ static void *smp_write_config_table(void *v) smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0, (((12)<<2)|(0)), apicid_sr5650, 30); /* Device 12 (LNKG, APIC pin 30) */ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0, (((13)<<2)|(0)), apicid_sr5650, 30); /* Device 13 (LNKG, APIC pin 30)) */ - dev = dev_find_slot(0, PCI_DEVFN(0x2, 0)); + dev = pcidev_on_root(0x2, 0); if (dev && dev->enabled) { uint8_t bus_pci = dev->link_list->secondary; smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0x2)|(0)), apicid_sr5650, 0); /* card behind dev2 */ } - dev = dev_find_slot(0, PCI_DEVFN(0x4, 0)); + dev = pcidev_on_root(0x4, 0); if (dev && dev->enabled) { uint8_t bus_pci = dev->link_list->secondary; smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0x4)|(0)), apicid_sr5650, 0); /* PIKE */ } - dev = dev_find_slot(0, PCI_DEVFN(0x9, 0)); + dev = pcidev_on_root(0x9, 0); if (dev && dev->enabled) { uint8_t bus_pci = dev->link_list->secondary; smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0x9)|(0)), apicid_sr5650, 23); /* NIC A */ } - dev = dev_find_slot(0, PCI_DEVFN(0xa, 0)); + dev = pcidev_on_root(0xa, 0); if (dev && dev->enabled) { uint8_t bus_pci = dev->link_list->secondary; smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0xa)|(0)), apicid_sr5650, 24); /* NIC B */ } - dev = dev_find_slot(0, PCI_DEVFN(0xb, 0)); + dev = pcidev_on_root(0xb, 0); if (dev && dev->enabled) { uint8_t bus_pci = dev->link_list->secondary; smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0xb)|(0)), apicid_sr5650, 0); /* card behind dev11 */ } - dev = dev_find_slot(0, PCI_DEVFN(0xc, 0)); + dev = pcidev_on_root(0xc, 0); if (dev && dev->enabled) { uint8_t bus_pci = dev->link_list->secondary; smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0xc)|(0)), apicid_sr5650, 0); /* card behind dev12 */ } - dev = dev_find_slot(0, PCI_DEVFN(0xd, 0)); + dev = pcidev_on_root(0xd, 0); if (dev && dev->enabled) { uint8_t bus_pci = dev->link_list->secondary; smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pci, (((0)<<0xd)|(0)), apicid_sr5650, 0); /* card behind dev13 */ @@ -183,7 +183,7 @@ static void *smp_write_config_table(void *v) PCI_INT(sp5100_bus_number, 0x11, 0x0, 0x16); /* 6, INTG */ /* PCI slots */ - dev = dev_find_slot(0, PCI_DEVFN(0x14, 4)); + dev = pcidev_on_root(0x14, 4); if (dev && dev->enabled) { u8 bus_pci = dev->link_list->secondary; |