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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-09-03 17:39:51 -0500
committerMartin Roth <martinroth@google.com>2015-11-30 05:29:47 +0100
commitb4b298c4498834ad221fdefd8d9bae74daeaa468 (patch)
treef900c8a914fa92714d976a84dc2a9a7c8d1b1ea3 /src/mainboard/asus/kgpe-d16
parent16a3a7515a65940698ec0325b6d89d5f7c40ca3c (diff)
downloadcoreboot-b4b298c4498834ad221fdefd8d9bae74daeaa468.tar.xz
mainboard/asus/kgpe-d16: Limit HT speed to 2.6GHz
The CPU <--> CPU HT wiring on this board has only been validated to 2.6GHz. While higher frequencies appear to function initially, and in fact function when only one CPU package is installed, dual CPU package systems will lock up after around 6 - 12 hours of uptime due to presumed HT link errors at the higher (>= 2.8GHz) HT clocks. If applications are not being used that stress the coherent fabric, then the uptime before hang may be much longer. Users attempting to overclock the HT links are advised to "burn in test" the HT links by running memtester locked to a node with no local memory installed. Change-Id: I8fae90c67aa0e8b103e9b8906dea50d1e92ea5a9 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/12064 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/asus/kgpe-d16')
-rw-r--r--src/mainboard/asus/kgpe-d16/romstage.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c
index ccb85f4044..df76ab4e55 100644
--- a/src/mainboard/asus/kgpe-d16/romstage.c
+++ b/src/mainboard/asus/kgpe-d16/romstage.c
@@ -322,6 +322,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
struct sys_info *sysinfo = &sysinfo_car;
+ /* Limit the maximum HT speed to 2.6GHz to prevent lockups
+ * due to HT CPU <--> CPU wiring not being validated to 3.2GHz
+ */
+ sysinfo->ht_link_cfg.ht_speed_limit = 2600;
+
uint32_t bsp_apicid = 0, val;
uint8_t byte;
msr_t msr;