diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-08-07 12:19:10 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-08-09 15:56:32 +0000 |
| commit | 08fc8fff255c3aa27362655887a5f5bcd786857c (patch) | |
| tree | 3947fb4c6ac77a6e357cd8968f7159d0c5888a47 /src/mainboard/asus/m4a78-em | |
| parent | 2f79eb3fd567b7578378c4acbecaf2502d1982f4 (diff) | |
| download | coreboot-08fc8fff255c3aa27362655887a5f5bcd786857c.tar.xz | |
src/mainboard: Fix typo
Change-Id: Ief6a04ccb63658b5fb03cd1d298bf00948cf7410
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/27912
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/asus/m4a78-em')
| -rw-r--r-- | src/mainboard/asus/m4a78-em/mainboard.c | 2 | ||||
| -rw-r--r-- | src/mainboard/asus/m4a78-em/resourcemap.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/asus/m4a78-em/mainboard.c b/src/mainboard/asus/m4a78-em/mainboard.c index 8a017a0b49..b39f9db259 100644 --- a/src/mainboard/asus/m4a78-em/mainboard.c +++ b/src/mainboard/asus/m4a78-em/mainboard.c @@ -76,7 +76,7 @@ void set_pcie_reset(void) /* * justify the dev3 is exist or not * NOTE: This just copied from AMD Tilapia code. - * It is completly unknown if it will work at all for this board. + * It is completely unknown if it will work at all for this board. */ int is_dev3_present(void) { diff --git a/src/mainboard/asus/m4a78-em/resourcemap.c b/src/mainboard/asus/m4a78-em/resourcemap.c index 95d009ac1e..acdf645a54 100644 --- a/src/mainboard/asus/m4a78-em/resourcemap.c +++ b/src/mainboard/asus/m4a78-em/resourcemap.c @@ -121,7 +121,7 @@ static void setup_mb_resource_map(void) * 0 = CPU writes may be posted * 1 = CPU writes must be non-posted * [31: 8] Memory-Mapped I/O Limit Address i (39-16) - * This field defines the upp adddress bits of a 40-bit address that + * This field defines the upp address bits of a 40-bit address that * defines the end of a memory-mapped I/O region n */ PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0x84), 0x00000048, 0x00000000, |