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| author | Juhana Helovuo <juhe@iki.fi> | 2010-09-13 14:51:26 +0000 |
|---|---|---|
| committer | Myles Watson <mylesgw@gmail.com> | 2010-09-13 14:51:26 +0000 |
| commit | d09d1f7846d546f1790cd9db107014ffec92cc27 (patch) | |
| tree | f646f0dbc8301fbd1c560952fdff996ff8861794 /src/mainboard/asus/m4a785-m/Kconfig | |
| parent | 6c029e6963eed378f80eeaebd5cbc7827c5d5c9f (diff) | |
| download | coreboot-d09d1f7846d546f1790cd9db107014ffec92cc27.tar.xz | |
Add support for Asus M4A785-M.
Signed-off-by: Juhana Helovuo <juhe@iki.fi>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5809 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/asus/m4a785-m/Kconfig')
| -rw-r--r-- | src/mainboard/asus/m4a785-m/Kconfig | 110 |
1 files changed, 110 insertions, 0 deletions
diff --git a/src/mainboard/asus/m4a785-m/Kconfig b/src/mainboard/asus/m4a785-m/Kconfig new file mode 100644 index 0000000000..6559712b8f --- /dev/null +++ b/src/mainboard/asus/m4a785-m/Kconfig @@ -0,0 +1,110 @@ +if BOARD_ASUS_M4A785M + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select ARCH_X86 + select CPU_AMD_SOCKET_AM3 + select DIMM_DDR2 + select NORTHBRIDGE_AMD_AMDFAM10 + select SOUTHBRIDGE_AMD_RS780 + select SOUTHBRIDGE_AMD_SB700 + select SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT + select SUPERIO_ITE_IT8712F + select BOARD_HAS_FADT + select HAVE_BUS_CONFIG + select HAVE_OPTION_TABLE + select GENERATE_PIRQ_TABLE + select GENERATE_MP_TABLE + select CACHE_AS_RAM + select HAVE_HARD_RESET + select SB_HT_CHAIN_UNITID_OFFSET_ONLY + select LIFT_BSP_APIC_ID + select SERIAL_CPU_INIT + select AMDMCT + select GENERATE_ACPI_TABLES + select BOARD_ROMSIZE_KB_1024 + select ENABLE_APIC_EXT_ID + select TINY_BOOTBLOCK + select GFXUMA + +config MAINBOARD_DIR + string + default asus/m4a785-m + +config APIC_ID_OFFSET + hex + default 0x0 + +config MAINBOARD_PART_NUMBER + string + default "M4A785-M" + +config HW_MEM_HOLE_SIZEK + hex + default 0x100000 + +config MAX_CPUS + int + default 8 + +config MAX_PHYSICAL_CPUS + int + default 2 + +config HW_MEM_HOLE_SIZE_AUTO_INC + bool + default n + +config MEM_TRAIN_SEQ + int + default 2 + +config SB_HT_CHAIN_ON_BUS0 + int + default 1 + +config HT_CHAIN_END_UNITID_BASE + hex + default 0x1 + +config HT_CHAIN_UNITID_BASE + hex + default 0x0 + +config IRQ_SLOT_COUNT + int + default 19 + +config AMD_UCODE_PATCH_FILE + string + default "mc_patch_010000b6.h" + +config RAMTOP + hex + default 0x2000000 + +config HEAP_SIZE + hex + default 0xc0000 + +config ACPI_SSDTX_NUM + int + default 0 + +config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID + hex + default 0x83a2 + +config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID + hex + default 0x1043 + +config RAMBASE + hex + default 0x200000 + +config COMPRESS + hex + default 0 + +endif |