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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-10-28 08:19:22 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-10-28 08:19:22 +0000 |
| commit | 77180546c84278f8e613aa912e432ee084425f88 (patch) | |
| tree | df5198a20c5e22a35f7917e50207d13d4e55f63a /src/mainboard/asus/p2b-d/romstage.c | |
| parent | 706b350be89185def17eb18fa8ccc1310ea1e0ac (diff) | |
| download | coreboot-77180546c84278f8e613aa912e432ee084425f88.tar.xz | |
Add IOAPIC support for Intel 82371EB and fixup SMP on ASUS P2B-D.
- Add enable_intel_82093aa_ioapic() which enables IOAPIC usage in the
Intel 82371EB southbridge (sets the proper chip-select) and sets an
IOAPIC ID.
- We only call enable_intel_82093aa_ioapic() if a board does "select IOAPIC"
as on 82371EB-based boards the IOAPIC is an external chip (not integrated
in the southbridge) and it's only populated on multi-CPU boards.
That is, we cannot unconditionally enable it, only on SMP-capable boards.
- Due to the reason explained above, remove "select IOAPIC" from
src/southbridge/intel/i82371eb/Kconfig, and add it to
src/mainboard/asus/p2b-d/Kconfig.
- Also set CONFIG_MAX_PHYSICAL_CPUS to 2 on ASUS P2B-D. There are two
CPU sockets (Slot 1) and each CPU can only have one core, multi-core CPUs
didn't exist in that era (CONFIG_MAX_CPUS was set to 2 already).
- Drop useless/duplicated enable_lapic() call from ASUS P2B-D's romstage.c,
that function is always called if either CONFIG_SMP and/or CONFIG_IOAPIC
are set.
- Rework ASUS P2B-D mptable.c to fix a number of things:
- Convert it to use mptable_write_buses() as all mptable.c files should do.
- Fix incorrect IOAPICID (it's 0x11 for the external 82093AA IOAPIC).
- Fix a bunch of hardcoded bus IDs, remove incorrect entries, etc.
This is build-tested on ASUS P2B-D, and also boot-tested successfully there.
On Linux I now get two entries in /proc/cpuinfo (where only one appeared
before this patch), i.e. both populated CPUs are found.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5998 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/asus/p2b-d/romstage.c')
| -rw-r--r-- | src/mainboard/asus/p2b-d/romstage.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/asus/p2b-d/romstage.c b/src/mainboard/asus/p2b-d/romstage.c index c5822a566b..a4abad4d09 100644 --- a/src/mainboard/asus/p2b-d/romstage.c +++ b/src/mainboard/asus/p2b-d/romstage.c @@ -25,7 +25,6 @@ #include <arch/romcc_io.h> #include <arch/hlt.h> #include <stdlib.h> -#include <cpu/x86/lapic.h> #include <console/console.h> #include "southbridge/intel/i82371eb/i82371eb.h" #include "northbridge/intel/i440bx/raminit.h" @@ -48,8 +47,6 @@ int spd_read_byte(unsigned int device, unsigned int address) void main(unsigned long bist) { - enable_lapic(); /* FIXME? */ - w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); uart_init(); console_init(); |