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| author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2007-12-17 14:33:32 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2007-12-17 14:33:32 +0000 |
| commit | 12a3f1edecbbc211327202782fbda027faea38b8 (patch) | |
| tree | 8f49743c52c7de4dbed4666a1cb0ebcff102d6a9 /src/mainboard/asus/p2b/Options.lb | |
| parent | 3b408fd23794c6d012be79173021e532d1b47ba6 (diff) | |
| download | coreboot-12a3f1edecbbc211327202782fbda027faea38b8.tar.xz | |
To make it easier to add new SPI chips to flashchips.c, rename functions
with multiple possible opcodes from linear numbering at the end (_1, _2)
to include the opcode at the end (_60, _c7). That way, you only have to
take a short look at the data sheet and choose the right function by
appending the opcode listed in the data sheet.
No functional changes.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ward Vandewege <ward@gnu.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3009 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/asus/p2b/Options.lb')
0 files changed, 0 insertions, 0 deletions