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authorKeith Hui <buurin@gmail.com>2020-02-02 20:23:03 -0500
committerAngel Pons <th3fanbus@gmail.com>2020-04-18 18:51:34 +0000
commit6f1494b25277af88cf1a7c010c1a75e641f45a08 (patch)
tree0daf7f6256aa6b7574fe047a22c1289f33e6293d /src/mainboard/asus/p2b/variants/p2b-d/mptable.c
parentd6d9a4e8c5630e7fb72d9b7d496ada4e8465daa5 (diff)
downloadcoreboot-6f1494b25277af88cf1a7c010c1a75e641f45a08.tar.xz
asus/p2b-d: Transform into variant
TEST=build with BUILD_TIMELESS=1, binary does not change Change-Id: I1161c726c8c752b5b1e152e1617811989631096e Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39903 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/asus/p2b/variants/p2b-d/mptable.c')
-rw-r--r--src/mainboard/asus/p2b/variants/p2b-d/mptable.c55
1 files changed, 55 insertions, 0 deletions
diff --git a/src/mainboard/asus/p2b/variants/p2b-d/mptable.c b/src/mainboard/asus/p2b/variants/p2b-d/mptable.c
new file mode 100644
index 0000000000..6c238f1da2
--- /dev/null
+++ b/src/mainboard/asus/p2b/variants/p2b-d/mptable.c
@@ -0,0 +1,55 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
+#include <stdint.h>
+
+static void *smp_write_config_table(void *v)
+{
+ int ioapic_id, ioapic_ver, isa_bus;
+ struct mp_config_table *mc;
+
+ mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
+
+ mptable_init(mc, LOCAL_APIC_ADDR);
+
+ smp_write_processors(mc);
+
+ mptable_write_buses(mc, NULL, &isa_bus);
+
+ ioapic_id = 2;
+ ioapic_ver = 0x11; /* External Intel 82093AA IOAPIC. */
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
+
+ /* Legacy Interrupts */
+ mptable_add_isa_interrupts(mc, isa_bus, ioapic_id, 0);
+
+ /* I/O Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */
+ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x13, ioapic_id, 0x13); /* UHCI */
+
+ /* Local Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */
+ mptable_lintsrc(mc, isa_bus);
+
+ /* Compute the checksums. */
+ return mptable_finalize(mc);
+}
+
+unsigned long write_smp_table(unsigned long addr)
+{
+ void *v;
+ v = smp_write_floating_table(addr, 0);
+ return (unsigned long)smp_write_config_table(v);
+}