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author | Keith Hui <buurin@gmail.com> | 2020-02-02 20:36:26 -0500 |
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committer | Angel Pons <th3fanbus@gmail.com> | 2020-04-18 18:51:44 +0000 |
commit | b7c11c6953285f64603a6e1a115b2fdc1505d832 (patch) | |
tree | 1c8a02b7185c2b12cd1fb58e4828ff568d87a735 /src/mainboard/asus/p2b/variants/p2b-ds/mptable.c | |
parent | 6f1494b25277af88cf1a7c010c1a75e641f45a08 (diff) | |
download | coreboot-b7c11c6953285f64603a6e1a115b2fdc1505d832.tar.xz |
asus/p2b-ds: Transform into variant
TEST=build with BUILD_TIMELESS=1, binary does not change
Change-Id: I864f939a84ee9e90013ba9d3fcc8a7e4bf03e4ee
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39904
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/asus/p2b/variants/p2b-ds/mptable.c')
-rw-r--r-- | src/mainboard/asus/p2b/variants/p2b-ds/mptable.c | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/src/mainboard/asus/p2b/variants/p2b-ds/mptable.c b/src/mainboard/asus/p2b/variants/p2b-ds/mptable.c new file mode 100644 index 0000000000..a180194b30 --- /dev/null +++ b/src/mainboard/asus/p2b/variants/p2b-ds/mptable.c @@ -0,0 +1,56 @@ +/* + * This file is part of the coreboot project. + * + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/smp/mpspec.h> +#include <arch/ioapic.h> +#include <stdint.h> + +static void *smp_write_config_table(void *v) +{ + int ioapic_id, ioapic_ver, isa_bus; + struct mp_config_table *mc; + + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); + + mptable_init(mc, LOCAL_APIC_ADDR); + + smp_write_processors(mc); + + mptable_write_buses(mc, NULL, &isa_bus); + + ioapic_id = 2; + ioapic_ver = 0x11; /* External Intel 82093AA IOAPIC. */ + smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR); + + /* Legacy Interrupts */ + mptable_add_isa_interrupts(mc, isa_bus, ioapic_id, 0); + + /* I/O Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */ + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x13, ioapic_id, 0x13); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, 0x0, 0x18, ioapic_id, 0x13); + + /* Local Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */ + mptable_lintsrc(mc, 0x1); + + /* Compute the checksums. */ + return mptable_finalize(mc); +} + +unsigned long write_smp_table(unsigned long addr) +{ + void *v; + v = smp_write_floating_table(addr, 0); + return (unsigned long)smp_write_config_table(v); +} |