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authorArthur Heymans <arthur@aheymans.xyz>2017-05-06 00:28:12 +0200
committerMartin Roth <martinroth@google.com>2017-07-12 17:38:45 +0000
commit42315688b582d26c6bd5a9e80b0f848959955ed6 (patch)
tree90df5e433ad9aaa75f94cc15400a095bb2fd5900 /src/mainboard/asus/p5gc-mx/Kconfig
parent1440c66b16a6c5a1fb4bfaa9511edfeea3f88c18 (diff)
downloadcoreboot-42315688b582d26c6bd5a9e80b0f848959955ed6.tar.xz
mb/asus/p5gc-mx: Implement resume from S3 support
Needs the ramstage configuration enabling of SuperIO GPIO pnp devices for BSEL straps. Also needs VSBGATE# to be on for ram to be powered during S3. TESTED with 800MHz and 1067MHz FSB CPUs at the correct straps when resuming from S3. Change-Id: I6ac927ee9dcce15fc7621aad57969fae8f5805ca Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19602 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/asus/p5gc-mx/Kconfig')
-rw-r--r--src/mainboard/asus/p5gc-mx/Kconfig1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/asus/p5gc-mx/Kconfig b/src/mainboard/asus/p5gc-mx/Kconfig
index d29f98d59a..f0f0dd73f1 100644
--- a/src/mainboard/asus/p5gc-mx/Kconfig
+++ b/src/mainboard/asus/p5gc-mx/Kconfig
@@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select CPU_INTEL_SOCKET_LGA775
select NORTHBRIDGE_INTEL_I945
select NORTHBRIDGE_INTEL_SUBTYPE_I945GC
- select CHECK_SLFRCS_ON_RESUME
select SOUTHBRIDGE_INTEL_I82801GX
select SUPERIO_WINBOND_W83627DHG
select HAVE_OPTION_TABLE