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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-11 21:56:37 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-15 18:06:27 +0000 |
| commit | 7843bd560e65b0a83e99b42bdd58dd6363656c56 (patch) | |
| tree | 0d411ba99ae94da46d3fccaf09f1208fc812bb6f /src/mainboard/asus/p5ql-em | |
| parent | c583920a748fb8bd7999142433ad08641b06283d (diff) | |
| download | coreboot-7843bd560e65b0a83e99b42bdd58dd6363656c56.tar.xz | |
nb/intel/x4x: Move to C_ENVIRONMENT_BOOTBLOCK
There is some overlap between things done in bootblock
and romstage like setting BARs.
Change-Id: Icd1de34c3b5c0f36f2a5249116d1829ee3956f38
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36759
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/asus/p5ql-em')
| -rw-r--r-- | src/mainboard/asus/p5ql-em/Makefile.inc | 3 | ||||
| -rw-r--r-- | src/mainboard/asus/p5ql-em/early_init.c (renamed from src/mainboard/asus/p5ql-em/romstage.c) | 3 |
2 files changed, 5 insertions, 1 deletions
diff --git a/src/mainboard/asus/p5ql-em/Makefile.inc b/src/mainboard/asus/p5ql-em/Makefile.inc index 641e18f136..ba881b7eeb 100644 --- a/src/mainboard/asus/p5ql-em/Makefile.inc +++ b/src/mainboard/asus/p5ql-em/Makefile.inc @@ -11,6 +11,9 @@ # GNU General Public License for more details. # +bootblock-y += early_init.c + romstage-y += gpio.c +romstage-y += early_init.c ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads diff --git a/src/mainboard/asus/p5ql-em/romstage.c b/src/mainboard/asus/p5ql-em/early_init.c index fa22a645d4..38038012f7 100644 --- a/src/mainboard/asus/p5ql-em/romstage.c +++ b/src/mainboard/asus/p5ql-em/early_init.c @@ -12,6 +12,7 @@ * GNU General Public License for more details. */ +#include <bootblock_common.h> #include <device/pnp_ops.h> #include <console/console.h> #include <northbridge/intel/x4x/x4x.h> @@ -24,7 +25,7 @@ #define SERIAL_DEV PNP_DEV(0x2e, W83627DHG_SP1) #define GPIO_DEV PNP_DEV(0x2e, W83627DHG_GPIO2345_V) -void mb_lpc_setup(void) +void bootblock_mainboard_early_init(void) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); } |