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authorAngel Pons <th3fanbus@gmail.com>2018-06-13 14:13:15 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-01-14 12:13:13 +0000
commitc69c8ddc2b62f008fafc85c66d993fd498417287 (patch)
treebdbcdbb900e818c9fcf4079d81b5a382720dd13c /src/mainboard/asus/p5qpl-am/variants/p5g41t-m_lx/overridetree.cb
parente124fa5a9d48d7248a1a1987805b9c1ac2bdbde8 (diff)
downloadcoreboot-c69c8ddc2b62f008fafc85c66d993fd498417287.tar.xz
mb/asus/p5qpl-am: Add p5g41t-m_lx as a variant
This board has more or less the same as the p5qpl-am except for DDR3 memory and different colors on the ports. Tested with Arch Linux with kernel 4.20.0-arch1-1-ARCH. What is tested and works: - 800/1066/1333 MHz CPUs and DDR3 sticks at 800/1066 MHz Some bugs are still present in the DDR3 raminit code though. - Ethernet - Internal programmer with both coreboot and stock firmware. - PCI and PCIe x1 slots - All USB ports - S3 resume - SATA ports - PEG - Rear audio output Change-Id: I92cd15a245c4f1d8f57b304c9c3a37ba29c35431 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/27089 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/asus/p5qpl-am/variants/p5g41t-m_lx/overridetree.cb')
-rw-r--r--src/mainboard/asus/p5qpl-am/variants/p5g41t-m_lx/overridetree.cb80
1 files changed, 80 insertions, 0 deletions
diff --git a/src/mainboard/asus/p5qpl-am/variants/p5g41t-m_lx/overridetree.cb b/src/mainboard/asus/p5qpl-am/variants/p5g41t-m_lx/overridetree.cb
new file mode 100644
index 0000000000..919d409181
--- /dev/null
+++ b/src/mainboard/asus/p5qpl-am/variants/p5g41t-m_lx/overridetree.cb
@@ -0,0 +1,80 @@
+#
+# This file is part of the coreboot project.
+#
+# Copyright (C) 2017 Arthur Heymans <arthur@aheymans.xyz>
+# Copyright (C) 2019 Angel Pons <th3fanbus@gmail.com>
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+chip northbridge/intel/x4x # Northbridge
+ device domain 0 on # PCI domain
+ subsystemid 0x1043 0x8179 inherit
+ chip southbridge/intel/i82801gx # Southbridge
+ device pci 1f.0 on # ISA bridge
+ chip superio/winbond/w83627dhg
+ device pnp 2e.0 off end # Floppy
+ device pnp 2e.1 on # Parallel port
+ # global
+ irq 0x2c = 0xf2
+ # parallel port
+ io 0x60 = 0x378
+ irq 0x70 = 7
+ drq 0x74 = 3
+ end
+ device pnp 2e.2 on # COM1
+ io 0x60 = 0x3f8
+ irq 0x70 = 4
+ end
+ device pnp 2e.3 off end # COM2, IR
+ device pnp 2e.5 on # Keyboard, mouse
+ io 0x60 = 0x60
+ io 0x62 = 0x64
+ irq 0x70 = 1
+ irq 0x72 = 12
+ end
+ device pnp 2e.6 off end # SPI
+ device pnp 2e.7 on end # GPIO6 (all input)
+ device pnp 2e.8 off end # WDT0#, PLED
+ device pnp 2e.9 on # GPIO2
+ irq 0xe4 = 0x04
+ end
+ device pnp 2e.109 off end # GPIO3
+ device pnp 2e.209 on # GPIO4
+ irq 0xe8 = 0x80
+ irq 0xf4 = 0xa4
+ irq 0xf5 = 0x46
+ end
+ device pnp 2e.309 on # GPIO5
+ irq 0xfa = 0xff
+ irq 0xf3 = 0x09 # RSVD SUSLED settings
+ end
+ device pnp 2e.a on # ACPI
+ irq 0xe4 = 0x10 # Power dram during s3
+ irq 0xe6 = 0x8c
+ irq 0xf2 = 0x7d
+ end
+ device pnp 2e.b on # HWM, front panel LED
+ io 0x60 = 0x290
+ irq 0x70 = 0
+ irq 0xf1 = 0xff
+ irq 0xf2 = 0x83
+ end
+ device pnp 2e.c on # PECI, SST
+ irq 0xe0 = 0x10
+ irq 0xe1 = 0x64
+ irq 0xe8 = 0x01
+ end
+ end
+ end
+ end
+ end
+end