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| author | Angel Pons <th3fanbus@gmail.com> | 2021-05-17 17:45:54 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-05-20 17:49:11 +0000 |
| commit | 81c2e02bb49f517e21e89806e372d7708c54beb1 (patch) | |
| tree | d08f9501ab02381b200b1b333d77559d108297b0 /src/mainboard/asus/p8z77-series/variants/p8z77-v_lx2/cmos.layout | |
| parent | ee5b24d232fea4bf6f097463b38f43f3e6bc9e29 (diff) | |
| download | coreboot-81c2e02bb49f517e21e89806e372d7708c54beb1.tar.xz | |
mb/asus/p8z77-v_lx2: Transform into variant setup
Get ready to squash all Asus Z77 boards together, so as to factor out
some redundant code.
Tested with BUILD_TIMELESS=1, coreboot.rom for the Asus P8Z77-V LX2
remains identical when not adding the .config file in it.
Change-Id: I701ec4adbc65732ffc0a60d311bf07bf7f414ebf
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54409
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/asus/p8z77-series/variants/p8z77-v_lx2/cmos.layout')
| -rw-r--r-- | src/mainboard/asus/p8z77-series/variants/p8z77-v_lx2/cmos.layout | 86 |
1 files changed, 86 insertions, 0 deletions
diff --git a/src/mainboard/asus/p8z77-series/variants/p8z77-v_lx2/cmos.layout b/src/mainboard/asus/p8z77-series/variants/p8z77-v_lx2/cmos.layout new file mode 100644 index 0000000000..0f9de5ed18 --- /dev/null +++ b/src/mainboard/asus/p8z77-series/variants/p8z77-v_lx2/cmos.layout @@ -0,0 +1,86 @@ +## SPDX-License-Identifier: GPL-2.0-only + +# ----------------------------------------------------------------- +entries + +# ----------------------------------------------------------------- +0 120 r 0 reserved_memory + +# ----------------------------------------------------------------- +# RTC_BOOT_BYTE (coreboot hardcoded) +384 1 e 2 boot_option +388 4 h 0 reboot_counter + +# ----------------------------------------------------------------- +# coreboot config options: console +395 4 e 3 debug_level + +# coreboot config options: southbridge +408 1 e 1 nmi + +409 2 e 4 power_on_after_fail +411 2 e 5 sata_mode + +# coreboot config options: northbridge +416 5 e 6 gfx_uma_size + +# coreboot config options: check sums +984 16 h 0 check_sum + +# ----------------------------------------------------------------- + +enumerations +#ID value text + +# Generic on/off enum +1 0 Disable +1 1 Enable + +# boot_option +2 0 Fallback +2 1 Normal + +# debug_level +3 0 Emergency +3 1 Alert +3 2 Critical +3 3 Error +3 4 Warning +3 5 Notice +3 6 Info +3 7 Debug +3 8 Spew + +# power_on_after_fail +4 0 Disable +4 1 Enable +4 2 Keep + +# sata_mode +5 0 AHCI +5 1 Compatible +5 2 Legacy + +# gfx_uma_size (Intel IGP Video RAM size) +6 0 32M +6 1 64M +6 2 96M +6 3 128M +6 4 160M +6 5 192M +6 6 224M +6 7 256M +6 8 288M +6 9 320M +6 10 352M +6 11 384M +6 12 416M +6 13 448M +6 14 480M +6 15 512M +6 16 1024M + +# ----------------------------------------------------------------- +checksums + +checksum 392 423 984 |