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author | Angel Pons <th3fanbus@gmail.com> | 2020-03-05 01:30:49 +0100 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-07 18:09:55 +0000 |
commit | ffcf641cc4cb9fc5b8a49599d001fbe180dea6fa (patch) | |
tree | 27833e5ec7030ecade70fbe68417016e71b05a33 /src/mainboard/asus/p8z77-v_lx2/dsdt.asl | |
parent | cf4ede85f9df3134d1c0adb7504b299355ec42a4 (diff) | |
download | coreboot-ffcf641cc4cb9fc5b8a49599d001fbe180dea6fa.tar.xz |
mb/asus/p8z77-v_lx2: Add new mainboard
This is an ATX mainboard with a LGA1155 socket and four DDR3 DIMM slots.
Porting was done using autoport and then doing a bunch of manual edits.
Working:
- All four DIMM slots
- Serial port to emit spam
- PS/2 keyboard
- S3 suspend/resume
- Rear USB ports
- Integrated graphics (libgfxinit)
- HDMI and VGA
- All PCIe ports
- Realtek GbE (coreboot must set the MAC address)
- Both PCI ports behind the ASM1083 PCI bridge
- SATA ports
- Native raminit
- Flashing with flashrom
- Rear audio output
- VBT
- SeaBIOS to boot Arch Linux
Untested:
- PS/2 mouse
- The other audio jacks
- EHCI debug
- Front USB headers
- Non-Linux OSes
Change-Id: Ia5d9176b6f435977ecdd4fc82fc4bc0974d8d6a4
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39299
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/asus/p8z77-v_lx2/dsdt.asl')
-rw-r--r-- | src/mainboard/asus/p8z77-v_lx2/dsdt.asl | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/src/mainboard/asus/p8z77-v_lx2/dsdt.asl b/src/mainboard/asus/p8z77-v_lx2/dsdt.asl new file mode 100644 index 0000000000..f164b332d0 --- /dev/null +++ b/src/mainboard/asus/p8z77-v_lx2/dsdt.asl @@ -0,0 +1,40 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018 Angel Pons <th3fanbus@gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/acpi.h> + +DefinitionBlock( + "dsdt.aml", + "DSDT", + 0x02, /* DSDT revision: ACPI v2.0 and up */ + OEM_ID, + ACPI_TABLE_CREATOR, + 0x20141018 /* OEM revision */ +) +{ + #include "acpi/platform.asl" + #include "acpi/superio.asl" + #include <cpu/intel/common/acpi/cpu.asl> + #include <southbridge/intel/common/acpi/platform.asl> + #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> + + Device (\_SB.PCI0) + { + #include <northbridge/intel/sandybridge/acpi/sandybridge.asl> + #include <drivers/intel/gma/acpi/default_brightness_levels.asl> + #include <southbridge/intel/bd82x6x/acpi/pch.asl> + } +} |