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authorStefan Reinauer <stepan@coresystems.de>2010-04-25 13:54:30 +0000
committerStefan Reinauer <stepan@openbios.org>2010-04-25 13:54:30 +0000
commitd55e26f1b1efe50aa013ad32bdf3e2b58101a64f (patch)
tree08e5801c91c46eb3837b90c1828fb7f4b96c0479 /src/mainboard/asus
parent7d2a39631efa117d7a5e89810e905a838789518f (diff)
downloadcoreboot-d55e26f1b1efe50aa013ad32bdf3e2b58101a64f.tar.xz
zero warnings days
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5492 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/asus')
-rw-r--r--src/mainboard/asus/a8v-e_se/romstage.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/src/mainboard/asus/a8v-e_se/romstage.c b/src/mainboard/asus/a8v-e_se/romstage.c
index b8a4483aff..3ec90f8010 100644
--- a/src/mainboard/asus/a8v-e_se/romstage.c
+++ b/src/mainboard/asus/a8v-e_se/romstage.c
@@ -80,7 +80,8 @@ static void activate_spd_rom(const struct mem_controller *ctrl)
{
}
-static void soft_reset(void)
+#include <reset.h>
+void soft_reset(void)
{
uint8_t tmp;
@@ -98,6 +99,9 @@ static void soft_reset(void)
}
}
+// defines S3_NVRAM_EARLY:
+#include "southbridge/via/k8t890/k8t890_early_car.c"
+
#define K8_4RANK_DIMM_SUPPORT 1
#include "northbridge/amd/amdk8/amdk8.h"
@@ -107,7 +111,6 @@ static void soft_reset(void)
#include "lib/generic_sdram.c"
#include "cpu/amd/dualcore/dualcore.c"
-#include "southbridge/via/k8t890/k8t890_early_car.c"
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"